The differential integrator in MPP is based on a small signal model. It's is not a true differential integrator for larger signals.
I'm submitting this alternative based on a Sample/Hold auto-zeroing configuration. The LF398 chip is inexpensive.
The second sample (EF) is used to charge the S/H capacitor. The main sample is fed to one side of the S/H capacitor, thereby subtracting the "memorized" EF from the input signal (auto-zero). The output of the S/H is then fed on to a true integrator.
This is the concept (node references corresponding to the MPP Rev. D schematic):

J1 and U2 were chosen for convenience in LTSpice, but the original J113 and TL072 can be used just as well.
I'm submitting this alternative based on a Sample/Hold auto-zeroing configuration. The LF398 chip is inexpensive.
The second sample (EF) is used to charge the S/H capacitor. The main sample is fed to one side of the S/H capacitor, thereby subtracting the "memorized" EF from the input signal (auto-zero). The output of the S/H is then fed on to a true integrator.
This is the concept (node references corresponding to the MPP Rev. D schematic):
J1 and U2 were chosen for convenience in LTSpice, but the original J113 and TL072 can be used just as well.
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