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  • Originally posted by Carl-NC View Post
    You will never be able to match the P and N drive of a half-bridge driver. To get the Rds to match, the PMOS needs to be much larger than the NMOS. Then the parasitic capacitance of the PMOS will be much larger and the damping will be different for the P & N. You can fake it somewhat by adding series resistance or extra capacitance to the FETs.
    Series resistance didn't prove to be an ideal solution maybe mosfet capacity!?

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    • Originally posted by Carl-NC View Post
      You will never be able to match the P and N drive of a half-bridge driver. To get the Rds to match, the PMOS needs to be much larger than the NMOS. Then the parasitic capacitance of the PMOS will be much larger and the damping will be different for the P & N. You can fake it somewhat by adding series resistance or extra capacitance to the FETs.
      Very true. You can get close enough to be usable.

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      • Serious conversation is how the difference in Rds on and Cds between P-ch and N-ch transistors will affect the real work in practice. It is good to make this:
        1. Adding of external resistors (this reduce the difference). The resistor in drain of N-ch transistor have to be with higher resistance.
        2. Adding of capacitor in parallel to TX coil.
        3. Use serially connected fast diodes with very low capacitance in series of the transistors
        All these thinks have to seriously reduce imbalance. Maybe some one have possibility to analyze these ideas with good software simulator.

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        • Originally posted by Detectorist#1 View Post
          Serious conversation is how the difference in Rds on and Cds between P-ch and N-ch transistors will affect the real work in practice. It is good to make this:
          1. Adding of external resistors (this reduce the difference). The resistor in drain of N-ch transistor have to be with higher resistance.
          2. Adding of capacitor in parallel to TX coil.
          3. Use serially connected fast diodes with very low capacitance in series of the transistors
          All these thinks have to seriously reduce imbalance. Maybe some one have possibility to analyze these ideas with good software simulator.
          Hello detector #1
          This is taught in first grade.
          You're posing like a fairground vendor.

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          • Originally posted by Carl-NC View Post

            For the half-sine the TX clocks are identical to the bipolar PI:

            Click image for larger version

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            For the Impulse waveform the TX clocks are this:

            Click image for larger version

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            Thanks Carl-NC
            Whoever can, helps.

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            • Greetings to all readers of this forum.

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              • Hi pechkata,
                Тhose who know doubt, those who do not know are certain.

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                • Hi, Carl, can you take a look at whether this source code will work correctly for half-sine, I made it for PIC16F18426
                  Attached Files

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                  • Originally posted by algan View Post
                    Hi, Carl, can you take a look at whether this source code will work correctly for half-sine, I made it for PIC16F18426
                    It looks like you are creating 10 positive pulses followed by 10 negative pulses. Half-sine recycles energy and requires alternating a single positive pulse with single negative pulse.

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                    • Maybe so?

                      PS:I don't know physically how the individual levels of PCLK1, NCLK1... correspond to the schematic diagram, so I have simply accepted them from the description of the published source code.
                      Perhaps, if they refer to some of traditional schemes, the ON should be SET, the OFF should be CLR
                      Attached Files
                      Last edited by boilcoil; Today, 01:23 PM.

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                      • Excuse me, now I read that it is a half-sine wave, so I am correcting myself.
                        Attached Files

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