Concept Design

[Willy Bayot]

maybe a backplane with a common voltage rail to common connections to the micro, so each module connects to an I/O
so these modules can be mixed and matched.

The modular architecture based on separate hardware modules has a limit in the interconnections between modules.
It is necessary to define the modules as such that they are LOOSELY connected with non-critical links.
Loose cables are very bad to conduct high frequency or low voltage signals.
They are also good antennas to pick the environmental noise (even power supply lines aree subject to this)

So, the functions of each module and its power supplies should be very well designed by putting together only the closely-related functions.

This is the same rules as on a software-based modular architecture.

It is very difficult to define general-purpose flexible modules without loosing global performance.
We speak here of a system with very critical circuits, they do not suffer such an approach.

[Mdtoday]

• STM32 : Good , STM32CUBE IDE, dedicated consoles, sensors
• PIC32MZ: (MK, MX) extensive, Harmony, MPLABX IDE, ECUs, CanBus, remote sensors, metal detection
• ESP-32 : basic

[ivconic]

• STM32: basic
• PIC32MZ (actually MX): none
• ESP-32: basic

[Willy Bayot]

Surprising calculation results on ADC specs
We took three sample ADC's:

• LTC2380-24 : 24-bit 2Msps SINAD 100dB ENOB 16.3 bits (because of SPI clock limitation : 1 µsec per slot)
• LTC2376-18 : 18-bit 250Ksps SINAD 102dB ENOB 16.6 bits (4µsec per slot, probably not fast enough for Direct Sampling, we could only get 2 slots for the first (most sensitive) detectionwindow of 10µsec)
• MAX11158 : +/- 5V, 18-bit 500Ksps SINAD 94dB ENOB 15.3 bits (2 µsec per slot)

What does that mean?

1. There is only ONE effective (ENOB) bit difference between 18-bit and 24-bit ADC
2. There is no difference in effective resolution between the LTC2380-24 and LTC2376-18
3. The MAXIM ADC is much less costly then the LTC2380 ($26), it contains its own voltage reference and is largely available in stock

What do we conclude?

[Olly]

Surprising calculation results on ADC specs
We took three sample ADC's:

• LTC2380-24 : 24-bit 2Msps SINAD 100dB ENOB 16.3 bits (because of SPI clock limitation : 1 µsec per slot)
• LTC2376-18 : 18-bit 250Ksps SINAD 102dB ENOB 16.6 bits (4µsec per slot, probably not fast enough for Direct Sampling, we could only get 2 slots for the first (most sensitive) detectionwindow of 10µsec)
• MAX11158 : +/- 5V, 18-bit 500Ksps SINAD 94dB ENOB 15.3 bits (2 µsec per slot)

What does that mean?

1. There is only ONE effective (ENOB) bit difference between 18-bit and 24-bit ADC
2. There is no difference in effective resolution between the LTC2380-24 and LTC2376-18
3. The MAXIM ADC is much less costly then the LTC2380 ($26), it contains its own voltage reference and is largely available in stock

What do we conclude?

It's normal for an ADC's SNR to be reduced with an increase in sample rate e.g.
The LTC2380-24 has an SNR of 100dB at 2MS/sec whereas the LTC2376-18 achieves slightly better SNR but at only 1/8th sample rate. (250kS/sec)

As an example, the AD7760 is a 24-bit ADC which can sample at up to 2.5MS/sec, but at that sample rate it only achieves around 100dB SNR.
At 1.25MS/sec it gets 104dB SNR and at 625kS/sec it gets 108dB SNR.
If you go all the way down to 78kS/sec then it can achieve 120dB SNR.

So SNR or ENOB is pretty much a trade off vs sample rate I'm afraid

[ivconic]

...[*]The MAXIM ADC is much less costly then the LTC2380 ($26), it contains its own voltage reference and is largely available in stock[/LIST]What do we conclude?

It sounds like a good choice.

[surfdetector]

It sounds like a good choice.

https://www.mouser.com/ProductDetail...FkAARMCg%3D%3D

For price reference in the USA

[waltr]

The MAX11158 : +/- 5V, 18-bit 500Ksps SINAD 94dB ENOB 15.3 bits (2 µsec per slot)

Does look like a good choice. With internal reference it is simpler to layout PCB and lowers cost even more.
Did look at the data sheet but didn't study enough to work out best SPI interface. I am sure we want to trigger conversion from host CPU hardware to keep jitter to a minimum.

Oh, and my CPU choices are:
PIC32MZ-EF - faster clock for SPI than PIC32MX plus very fast math. Also I know this one and its tools (MPLAB X).
STM32 - second due to not knowing it tools and internal peripherals.
ESP32 - Good for WiFi & Blue tooth- don't think it is good for controlling hardware.

[Carl-NC]

I suggested the LTC family primarily based on the requests that we have a sample rate up to 1MSps and that we support up to 24 bits. As I've said before, I personally think both are overkill and had intended to start with 18b-250k for myself. So I'm fine with moving to the Maxim part, however it pains me to lose 6dB of SNR. The Maxim part has 200uvpp of input noise assuming a 10vpp signal and my noise calculations suggested 300uvpp of AFE noise. In the end it still may not matter as I also intend to increase the AFE gain so that will push AFE noise up and the ADC may end up in the mud.

[Willy Bayot]

[QUOTE=Olly;n410175]


The LTC2380-24 has an SNR of 100dB at 2MS/sec whereas the LTC2376-18 achieves slightly better SNR but at only 1/8th sample rate. (250kS/sec)
/QUOTE]

The text at the beginning of the datasheet specifying 100dB at 1.5Msps is contradicted in the body of the document.

On to the Dynamic Accuracy tables of both LTC23xx, the SNR of 100dB is measured at fIN 2Ksps, not at 1Msps. It goes up to 130dB at fIN 100Hz!!
See graph 'SNR, SINAD vs Input Frequency' in page 7

That is a big difference.

The datasheet of MAX11158 specifies a SNR of 93.7dB at fIN 10Khz but it keeps a SNR of 90dB at fIN 100Khz
see graph 'SINAD and ENOB vs. FREQUENCY' at page 8

[Willy Bayot]

I propose we organize an experiment of the CCPI circuit (designed by Moodz and PCB implemented by KINGJL) connected to a COIL assembly (concentric, DD,.. TBD) and an elementary AFE circuit (with or without ADC, TBD).
We must check by ourselves if the whole system is feasible and does not hide bad surprises before going on.

However, we still have to design a AFE circuit which will depends on the selection of the ADC (its power supply, VREF and VIN)..
Thus, we must make a final decision about the ADC to be used in a first round of experimentations.

Anybody ready to put a proposal on the table?

[moodz]

I propose we organize an experiment of the CCPI circuit (designed by Moodz and PCB implemented by KINGJL) connected to a COIL assembly (concentric, DD,.. TBD) and an elementary AFE circuit (with or without ADC, TBD).
We must check by ourselves if the whole system is feasible and does not hide bad surprises before going on.

However, we still have to design a AFE circuit which will depends on the selection of the ADC (its power supply, VREF and VIN)..
Thus, we must make a final decision about the ADC to be used in a first round of experimentations.

Anybody ready to put a proposal on the table?

create a shortlist of the candidate ADC ... here is my vote LTC2338-18

[Olly]

[QUOTE=Willy Bayot;n410201]

The LTC2380-24 has an SNR of 100dB at 2MS/sec whereas the LTC2376-18 achieves slightly better SNR but at only 1/8th sample rate. (250kS/sec)
/QUOTE]

The text at the beginning of the datasheet specifying 100dB at 1.5Msps is contradicted in the body of the document.

On to the Dynamic Accuracy tables of both LTC23xx, the SNR of 100dB is measured at fIN 2Ksps, not at 1Msps. It goes up to 130dB at fIN 100Hz!!
See graph 'SNR, SINAD vs Input Frequency' in page 7

That is a big difference.

The datasheet of MAX11158 specifies a SNR of 93.7dB at fIN 10Khz but it keeps a SNR of 90dB at fIN 100Khz
see graph 'SINAD and ENOB vs. FREQUENCY' at page 8

Make sure not to confuse sampling frequency Fsmpl with the frequency of the input signal being measured Finput.

Regards

[ivconic]

I suggested the LTC family primarily based on the requests that we have a sample rate up to 1MSps and that we support up to 24 bits. As I've said before, I personally think both are overkill and had intended to start with 18b-250k for myself. So I'm fine with moving to the Maxim part, however it pains me to lose 6dB of SNR. The Maxim part has 200uvpp of input noise assuming a 10vpp signal and my noise calculations suggested 300uvpp of AFE noise. In the end it still may not matter as I also intend to increase the AFE gain so that will push AFE noise up and the ADC may end up in the mud.

I saw several times mentioning high gain and I don't understand why?
Stong TX and high gain at RX = always not winning combination, imho.
Not only in PI nugget hunters but also in any "general purpose" PI too.
I understand that use of ADC and direct sampling will ask for certain gain rise in RX, alright.
But can we anticiptate the limtis? Using spice and math? Everything above x20 to x50 will introduce the S/N problems, obvious.
And here I think i read somewhere intention of x200 and more!???
That's why I am not for direct sampling, because things would be not much simpler and probably not easier to materialize.
Let someone of you more skilled in math and spice show to the rest of us the comparison table with what we gain/lose at:
- Gain x20
- Gain x50
- Gain x100
- Gain x200
etc.

Anbody with sticky fingers on a calcutator here!?

[ivconic]

About ADC choice... as layman I like last Willy's suggestion.
But what do I know.
So I will respect what the majority decides.
Because no matter the choice; the same to me: I will have problems to obtain it anyway.
So my vote goes to majority decision.