AMX Digital

[Willy Bayot]

This is where digital modulles considerations and discussions could be started.

[Willy Bayot]

Direct Sampling

Advantages:

• Simpler receiver circuits
• more flexible signal windows organisation

ADC calculations
integrated 12-bit ADC

• 0-3.3V --> resolution 0.8mV

External 16-bit ADC

• 0-5V --> resolution 76µV
• -5/+5V --> resolution 152µV

External 24-bit ADC

• 0-5V --> resolution 0.3µV
• -5/+5V --> resolution 0.6µV

Our own experiences with Direct Sampling:

• Integrated 1.5Mbps 12-bit ADC under DMA support
• Digital integration (x1500)
• One net sample result every milliseconds

did not give acceptable detection sensitivities with the maximum analog gain we could apply on the signal before saturation.

The fastest External ADC's required for direct sampling have parallel interfaces.
Taking 16 or 24 digital pins out of a micro-processor is usually excluded.
Thus, we are back to the serial interface (fast SPI with DMA support)

External ADC's come with or without integrated multiplexer.
Since we certainly need to capture signal data from several analog sources, we have the choice between:

• Mutiplexed ADC or
• one Single input ADC with external multiplexer or
• Several single input ADC.

Fast external ADC's are expensive, so, we are left with integrated or external Multiplexers feeding a single ADC.

Analog Integrated ADC sampling

Requires less speed but still requires a resolution of at least 16 bits with a supplementary digital integration and filtering
More ADC's of that type are available at an acceptable price.

[Carl-NC]

This discussion should really be at the concept level.

Regardless of hardware or software demodulation, 12 bits ain't gonna cut it if we want cutting-edge performance. For hardware demods I would suggest 16-18 bits and it really needs to be simultaneous sampling in order to keep the data time-aligned, especially if GB is achieved after the demods. Simultaneous sampling ADCs are mostly limited to 8 channels unless you consider ultrasound chips, which I would not recommend. Besides, 8 analog channels is about the most you can practically pack on a PCB. At FTP I'm mostly using the ADS131E08 24b/8ch ADC @ 1kHz. However, it's a little rigid in it's sample rate requirement and as you sample higher it loses resolution.

For direct sampling, it needs to be 24 bits. Nothing less. A fast SAR like the AD7766.

Either method results in a very high serial data rate. In both cases you probably want to DMA the data into memory and even do some real-time data summation before presenting the readings to the DSP task. This will slow down the task loop to a reasonable rate and minimize overhead. Speaking of task loops, I strongly recommend using FreeRTOS to manage the firmware.

So is it analog demods or direct sampling?

Whether you choose analog demods of direct sampling may depend on how the TX is designed. Tony suggested a chirp method. This can be done using a linear sweep (what chirp really means) or using a few discrete steps. For the linear sweep, I don't know what the RX scheme would look like, Tony would have to elaborate. Discrete steps could use either analog demods of direct sampling. It should be noted that analog demods have the advantage of doing real-time integration, whereby you are integrating the RX signal as long as the demod switch is closed. This helps with SNR and also with implementing GB. Direct sampling cannot do this, you get an instantaneous point and that's all (think about this for GB). All-in-all, analog demods will probably always outperform direct sampling but uses more board space, consumes more power, costs more (maybe), requires more timers, is limited to 8 channels, and is less flexible.

Since I can't envision off-hand how to accomplish a linear chirp system, I would propose a pulse train with discrete selected pulse widths. The more different pulse widths that are used, the less depth you get via processing gain. So I would limit it to 2 or 3 different widths at the most. Probably start with 2. For maximum flexibility and probably faster prototyping I would use direct sampling and only consider changing to analog demods if performance demands it.

[moodz]

... yeh it has to be 24 bits for resolution and non multiplexed ( ie simultaneous ) sampling.

I am going to suggest the MCP39xx range of ADCs from microchip ... eg MCP3914

1. They are cheap and they are available.
2. They are industrial rated.
3. They are 24 bits
4. They accept +/- inputs ( dont get hung up on input ranges ... simple scaling / shifting networks handle this )
5. Multiple inputs.
6. Oversampling to 4 MSPS
7. Programmable gain amplifiers on inputs / differential or single ended.
8. Phase offset / gain calibrations
9. Obviously they talk to PIC32 chips and lots of source code / libraries available.
10. High speed serial interface ( minimal connections )
...read the data sheets

https://www.microchip.com/en-us/prod...energy-devices

moodz

[Carl-NC]

4. They accept +/- inputs ( dont get hung up on input ranges ... simple scaling / shifting networks handle this )

Generally, the higher you can run the input range the better the SNR. This might require running even the preamp or demods from a higher-than-usual supply. Ferinstance, in one of my designs I use an ADC which has a 4.096V reference option and can therefore accept a +/- 4V input. So the preamp runs at +/- 2.5V and the demods run at +/- 4V. In this particular design I am using a true ground instead of a rail splitter. So there are a lot of things to consider, which is why I recommend architecting the design before designing it.

Also beware the internal PGAs on ADCs. A lot of them loose SNR as you increase the gain. You can almost always design a better external amp.

[moodz]

.. well the design architecture will need to cater for a high degree of flexibility ( functional blocks and modularity ) because there is sure to be someone out there who wants to use a 555 to do the ADC function. ( I am not joking )

[ivconic]

Direct Sampling

Advantages:

• Simpler receiver circuits
• more flexible signal windows organisation

ADC calculations
integrated 12-bit ADC

• 0-3.3V --> resolution 0.8mV

External 16-bit ADC

• 0-5V --> resolution 76µV
• -5/+5V --> resolution 152µV

External 24-bit ADC

• 0-5V --> resolution 0.3µV
• -5/+5V --> resolution 0.6µV

Our own experiences with Direct Sampling:

• Integrated 1.5Mbps 12-bit ADC under DMA support
• Digital integration (x1500)
• One net sample result every milliseconds

did not give acceptable detection sensitivities with the maximum analog gain we could apply on the signal before saturation.

The fastest External ADC's required for direct sampling have parallel interfaces.
Taking 16 or 24 digital pins out of a micro-processor is usually excluded.
Thus, we are back to the serial interface (fast SPI with DMA support)

External ADC's come with or without integrated multiplexer.
Since we certainly need to capture signal data from several analog sources, we have the choice between:

• Mutiplexed ADC or
• one Single input ADC with external multiplexer or
• Several single input ADC.

Fast external ADC's are expensive, so, we are left with integrated or external Multiplexers feeding a single ADC.

Analog Integrated ADC sampling

Requires less speed but still requires a resolution of at least 16 bits with a supplementary digital integration and filtering
More ADC's of that type are available at an acceptable price.

I like this post, sublimates more practical information.

"...Thus, we are back to the serial interface (fast SPI with DMA support)..."

I2S ?

"...Since we certainly need to capture signal data from several analog sources..."

How much would we need in this case?
I guess 3 at most and I expect 2.

[Dean Sarelius]

Hi gents,
Just a quick sanity check.
For the AMX project I gather this is going to be a TX/RX bi-polar quasi resonant design with the ultimate goal to sample the reactive component of the signal...?
So the reactive sampling window will eventually govern the neccessary speed required to sample before and after the reactive pivot point is that correct..?

[ivconic]

This discussion should really be at the concept level.

Regardless of hardware or software demodulation, 12 bits ain't gonna cut it if we want cutting-edge performance. For hardware demods I would suggest 16-18 bits and it really needs to be simultaneous sampling in order to keep the data time-aligned, especially if GB is achieved after the demods. Simultaneous sampling ADCs are mostly limited to 8 channels unless you consider ultrasound chips, which I would not recommend. Besides, 8 analog channels is about the most you can practically pack on a PCB. At FTP I'm mostly using the ADS131E08 24b/8ch ADC @ 1kHz. However, it's a little rigid in it's sample rate requirement and as you sample higher it loses resolution.

For direct sampling, it needs to be 24 bits. Nothing less. A fast SAR like the AD7766.

Either method results in a very high serial data rate. In both cases you probably want to DMA the data into memory and even do some real-time data summation before presenting the readings to the DSP task. This will slow down the task loop to a reasonable rate and minimize overhead. Speaking of task loops, I strongly recommend using FreeRTOS to manage the firmware.

So is it analog demods or direct sampling?

Whether you choose analog demods of direct sampling may depend on how the TX is designed. Tony suggested a chirp method. This can be done using a linear sweep (what chirp really means) or using a few discrete steps. For the linear sweep, I don't know what the RX scheme would look like, Tony would have to elaborate. Discrete steps could use either analog demods of direct sampling. It should be noted that analog demods have the advantage of doing real-time integration, whereby you are integrating the RX signal as long as the demod switch is open. This helps with SNR and also with implementing GB. Direct sampling cannot do this, you get an instantaneous point and that's all (think about this for GB). All-in-all, analog demods will probably always outperform direct sampling but uses more board space, consumes more power, costs more (maybe), requires more timers, is limited to 8 channels, and is less flexible.

Since I can't envision off-hand how to accomplish a linear chirp system, I would propose a pulse train with discrete selected pulse widths. The more different pulse widths that are used, the less depth you get via processing gain. So I would limit it to 2 or 3 different widths at the most. Probably start with 2. For maximum flexibility and probably faster prototyping I would use direct sampling and only consider changing to analog demods if performance demands it.

Another good post, sublimates also more answers.
You also answered my question about the chirp method, from another topic.
Although I don't see the need for a linear sweep.
Few discrete steps makes more sense to me.
Boss, you again subsequently summarized in brief what I explained at length on another topic!
But you also explained some things that I didn't mention and that I don't know.
Thanks for this second one!
I am in favor of not going with direct sampling.
Answer me briefly and clearly just this, what do you think: how many ADC channels do we realistically need?
(Keep in mind; this is about nugget hunter, we don't want Disc here).
If the answer is "2" I would go with the proven WM8738 which meets all the essential criteria.
It can be bought separately on Ali, it doesn't cost much, it's easy to integrate.
The same question for Willy is in the previous post.
But if I2S can only address 2 channels (not sure yet, have to check) and your answer is more than "2"... this will be serious roadblock for my wishes.
And finally the most important thing! RTOS!
I really like that idea. But I was not able recently to install the software and firmware for STM32 and RTOS.
Do you have the time and will to explain step by step on a separate topic how to arrange the software environment for Free RTOS.
And so, in my case, for STM32...
Specifically for the STM32F103C8T6.

[ivconic]

.. well the design architecture will need to cater for a high degree of flexibility ( functional blocks and modularity ) because there is sure to be someone out there who wants to use a 555 to do the ADC function. ( I am not joking )

I don't take it as a joke, but as an interesting option!
I would like to see a detailed elaboration on a separate topic!
I've always been drawn to knowledge before the mass advent of cheap processors.
I believe that many would opt for that option, if we developed it as an option here.
In not being able to keep up with other people here, in terms of easy sourcing of components; this can become a very serious option.

[ivconic]

Along with WM8738 with which I have practical experiences; I have found another nice ADC that looks alright. Except that it is in TSSOP package.
CS5343
Channels (Inputs) 2
Resolution (bits) 24
Dynamic Range (dB) 98
THD+N (dB) -92
Sample Rate (kHz) 96
Analog Inputs/Outputs Single-ended
Analog Power Supply (V) 3.3-5
Digital Power Supply (V) 3.3-5
Logic Power Supply (V) 3.3-5
Operational Power Consumption (mW) 36-85
Package 10 TSSOP
36 mW power consumption at 3.3V
Auto-mode sample-rate detection
256x or 384x MCLK/LRCK ratio
CS5343 supports I²S audio format
CS5344 supports LJ audio format

[waltr]

Two interesting ADC's listed in above posts. The Microchip MPU3914 and the Cirrus CS5343.

Both are Delta-Sigma Analog-to-Digital (A/D) Converters.
How well does Delta-Sigma work to sample PI decays?

Asking due to never used Delta-Sigma ADCs. Have only used SAR's for this type of sampling.

Is 96sps fast enough?
Is the idea to do a simple Sample during the coil/target decay?

What I had been working on (PIC32MX) was to sample at 500kHz during the decay to obtain the shape of the decay curve.
Also, summed a window of samples for 'target detection' (similar to a PI's analog integrator).

What/ When is the ADC taking samples?

Is it time to start discussing what the Firmware will be doing with the ADC samples?
Or should this be another AMX Digital thread?

[Willy Bayot]

Two interesting ADC's listed in above posts. The Microchip MPU3914 and the Cirrus CS5343.

Both are Delta-Sigma Analog-to-Digital (A/D) Converters.
How well does Delta-Sigma work to sample PI decays?

Asking due to never used Delta-Sigma ADCs. Have only used SAR's for this type of sampling.

Is 96sps fast enough?
Is the idea to do a simple Sample during the coil/target decay?

What I had been working on (PIC32MX) was to sample at 500kHz during the decay to obtain the shape of the decay curve.
Also, summed a window of samples for 'target detection' (similar to a PI's analog integrator).

What/ When is the ADC taking samples?

Is it time to start discussing what the Firmware will be doing with the ADC samples?
Or should this be another AMX Digital thread?

MPU3914 gives 24 bits at 125KHz WHEN CLOCKED from 16MHz with integrated MTPX of 8 channels
CS5343 gives 24 bits at 96Ksps (not 96sps) with single input

The two ADC's come at about the same price on MOUSER.
These ADC's could only be used with an analog integrated sampling. They are not fast enough for the direct sampling technique.

Is the idea to do a simple Sample during the coil/target decay?
It depends what you mean by 'simple sample'
The integrated sampling reads the output of each demodulator and optionally makes a supplementary digital integration. before using the net result in DSP.
e.g. An ADC giving 125Ksps (real data stream, possibly with DMA support) could be digitally integrated 40x to give a net result every 5msec.

sample at 500kHz during the decay to obtain the shape of the decay curve.
This is direct sampling, that supposes a DMA support and a completely different type of processing.
ADC's of 24 bits with that type of data rate or more are still difficult to find in stock at the usual reliable suppliers.

What/ When is the ADC taking samples?
This is something still to be discussed later but it is indeed an important question.

[KingJL]

MPU3914 gives 24 bits at 125KHz WHEN CLOCKED from 16MHz with integrated MTPX of 8 channels
CS5343 gives 24 bits at 96Ksps (not 96sps) with single input

The two ADC's come at about the same price on MOUSER.
These ADC's could only be used with an analog integrated sampling. They are not fast enough for the direct sampling technique...

For the discussion about what and possible methodology, let me throw into the mix the TLV320ADC5120... 768ksps, cheaper than those so far mentioned ($2.38 @LCSC), and available. I am currently using in conjunction with a PIC32Mk0512MCJ064 (also with PIC18F57/47Q43 but with less time to do other processing) with the TLV320 configured in master mode and using the LRCK (from the TLV320) as the time base to generate all MD timing signals.

[Carl-NC]

Answer me briefly and clearly just this, what do you think: how many ADC channels do we realistically need?
(Keep in mind; this is about nugget hunter, we don't want Disc here).

Why do you say that? I think discrimination should be on the table as it can be critical in some places. Most of the places I hunt are littered with iron flecks from old rotted cans. To a PI without discrimination they sound just like a nugget. In Africa some of the places they hunt are littered with iron-age artifacts such as arrow heads. While you & I might think they are cool, the Africans don't want to dig a 1 meter hole to pull out a spear point.

Without discrimination, you probably want 2 channels per TX pulse width: one for target and one for ground. So for 2 pulse widths you need 4 channels. But when running even just 2 pulse widths there may be other samples you want to take. This is why I favor direct sampling initially, it removes constraints. If I were to start with analog demods I would automatically assume 8 channels, because I would want to do some R&D.