Originally posted by Carl
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The second capture phase (made in parallel by the main program loop) is made by synchronizing the reading in the FIFO with the start of each period and accumulating the FIFO values into the slots of another array. The end result is an array made of as many slots as necessary to cover the whole pulse period. Example : period of 200µsec captured @ 1Msps generates 200 slots.
Each slot is the integration of a number of consecutive periods (e.g. integration of 20 consecutive periods gives one net series of accumulated slots every 4msec).
Next, the real windowing is defined by selecting the starting slot and width of each digital integration window and they are accumulated in as many virtual demodulators.
Finally, the demodulators are used for the DSP and reporting.
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