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  • #31
    Originally posted by jeep6789 View Post
    Good, you will be satisfactory
    Hoping to be a bit better than that

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    • #32
      The magnification of two 6200 is 1000 times. In this case, the output waveform is very shake, far exceeds the accuracy of the 16-bit ADC, I don't know how you deal with it, I think the pre-level enlargement is 100 times behind the ADC detection,

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      • #33
        Originally posted by jeep6789 View Post
        The magnification of two 6200 is 1000 times. In this case, the output waveform is very shake, far exceeds the accuracy of the 16-bit ADC, I don't know how you deal with it, I think the pre-level enlargement is 100 times behind the ADC detection,
        I'm expecting 2 to 3 mVrms of noise at the output (system noise, not that introduced via RF/EMI pickup from the coil), so yes this is higher than the bit resoliution of the ADC, however we can reduce this noise my oversampling. Typically noise is reduced by 3dB every time you double the number of samples. e.g. If we oversample 4x then this will reduce the noise by 6dB or down to 1/2 of what it was.

        I plan to oversample by 16x with a rolling average so expect noise levels to be reduced down to 0.5 to 0.75 mVrms. Hopefully this will be sufficient, but if not we can probably oversample by as much as 64x without losing too much response if we bump the pulse rate up a bit.

        Does this answer your question?

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        • #34
          ok

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          • #35
            Preliminary PCB Placement

            Rough placement, still some arranging to do but looks like I can get it to fit on 86mm x 55mm.
            LCD & Encoder on other side.

            Click image for larger version

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            • #36
              Is D2D3 not the same clamping effect in my picture? If the introduction of feedback is 6200, is it able to enhance the stability of the circuit?Click image for larger version

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              • #37
                Click image for larger version

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                • #38
                  Originally posted by jeep6789 View Post
                  [ATTACH]57069[/ATTACH]
                  Hi Jeep, actually your circuit will clamp the output permanently to around -4.5V, but I get where you're coming from...
                  Could I have just used a resistor-diode clamp at the output before feeding the ADC ?

                  The answer is yes, it might have worked if we could use a sufficiently high value resistor so that the opamp doesn't have to provide excess current when clamping.
                  However, the ADC needs a low input impedance and the recommended value is 22 Ohms, this would have made our clamping current 4.5/22 which is over 200mA and clearly not a viable solution.

                  I then tried a typical precision rectifier circuit at the output of U9 but found that the recommended filter capacitor (C2 of 1.7nF slowed the response down to unacceptable levels. Ref below: -
                  https://en.wikipedia.org/wiki/Precision_rectifier

                  What I eventually settled on was to use diodes D2 and D3 to provide unity gain for the half cycle I wasn't interested in and so prevent the output from U9 from ever going much below 0.5V. This retains the speed I need and solves the clamping current problem.

                  Here is a simulation showing the voltages of interest.
                  Click image for larger version

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                  The top trace shows the flyback voltage
                  The middle trace shows the output from U8 and the bottom trace shows the final signal delivered to the ADC at T10.

                  Regards

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                  • #39
                    Originally posted by jeep6789 View Post
                    [ATTACH]57069[/ATTACH]

                    D3 is backwards....

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                    • #40
                      Placement getting there, some re-arranging of the ADC and preamp to improve the analogue and digital GND plane spilt.
                      Click image for larger version

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                      • #41
                        How to ensure that the 6200 output must be higher than the GND level, so that ADC can detect positive voltages.

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                        • #42
                          stb14mn50n What kind of advantage is it compared to IRF740?

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                          • #43
                            Originally posted by jeep6789 View Post
                            How to ensure that the 6200 output must be higher than the GND level, so that ADC can detect positive voltages.
                            Please read Post #38

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                            • #44
                              Originally posted by jeep6789 View Post
                              stb14mn50n What kind of advantage is it compared to IRF740?
                              The STB14NM50 is a higher voltage device (500V vs 400V) than the IRF740 and is surface mount which is why I chose it.
                              Initially it appears to have better Coss then the IRF740, but this is quoted at 50V and the IRF740 is quoted at 25V so they probably end up being very similar.

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                              • #45
                                If the black and non-ferrous metal is distinguished by the slope, the coil of 40 cm or less in diameter can be done. The smaller the coil, the stronger the ability to distinguish, the greater the coil, the smaller the ability to distinguish, for one meter or more

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