Now that the big interrupt routine is done (except for fine tuning) perhaps I should review what it does. This routine performs two functions. It provides a 6600 Hz transmit signal, and it digitizes and demodulates the receive signal.
The transmit signal is a 6600 Hz rectangular pulse. This is a logic signal which can be used to control a current source which drives the coil. This method is suitable for White's BM coils which use a parallel resonant circuit (tank circuit). It is not suitable for other coils that have an un-tuned transmit winding (like Tesoro). The transmit pulse has a variable duty cycle. I plan to use this to try to get one or two more bits of dynamic range from the system by cutting the transmit signal to 1/2 or 1/4 of the normal strength. There are some practical problems to overcome to achieve this, but I wanted it designed in to the front end so it is available later.
The received signal is digitized by the on board 10 bit A/D converter, and demodulated in a dual synchronous demodulator which produces two output channels. The demodulation is achieved by sampling the signal at 4 phase angles (P, P+90, P+180, P+270). The P and P+180 samples are subtracted from each other to produce the signal for one channel. The P+90 and P+270 samples are subtracted from each other for the other channel. Both signals are run through a median filter then added into 24 bit accumulators. Sixty times a second the contents of the accumulators are dumped into memory and the accumulators are reset. This produces two signal channels at 60 Hz. With full scale inputs, these output signals can be +/- 37851, which is a little over 16 bits.
Robert Hoolko
The transmit signal is a 6600 Hz rectangular pulse. This is a logic signal which can be used to control a current source which drives the coil. This method is suitable for White's BM coils which use a parallel resonant circuit (tank circuit). It is not suitable for other coils that have an un-tuned transmit winding (like Tesoro). The transmit pulse has a variable duty cycle. I plan to use this to try to get one or two more bits of dynamic range from the system by cutting the transmit signal to 1/2 or 1/4 of the normal strength. There are some practical problems to overcome to achieve this, but I wanted it designed in to the front end so it is available later.
The received signal is digitized by the on board 10 bit A/D converter, and demodulated in a dual synchronous demodulator which produces two output channels. The demodulation is achieved by sampling the signal at 4 phase angles (P, P+90, P+180, P+270). The P and P+180 samples are subtracted from each other to produce the signal for one channel. The P+90 and P+270 samples are subtracted from each other for the other channel. Both signals are run through a median filter then added into 24 bit accumulators. Sixty times a second the contents of the accumulators are dumped into memory and the accumulators are reset. This produces two signal channels at 60 Hz. With full scale inputs, these output signals can be +/- 37851, which is a little over 16 bits.
Robert Hoolko
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