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Below is the schematic of the the differential front end test unit called "Model T".
Notes.
1. The bias generator is referenced against VPP ( ie battery +Volts ) .... this means that as far as the differential amplifier is concerned VPP is analogue ground. The bias generator feeds the +/- 5 volt regulators which in turn supply the diff amp. In theory given the ratings of the components the DC battery supply voltage could be as high as 35 volts approx !!! The intput to the bias generator is fed by the same output as the gate drive to the NMOS FET. I did have some concern that this would impact the rise / fall ( turnoff time critical ) of the FET switch. However the impact was less than 4 ns measured on the CRO. This helps simplify and cheapen the circuit whilst synchronising bipolar supply noises.
2. The amplifier is run at its maximum specified voltage gain. ( 1000X or 60dB ) This presumably means that a 1uVolt signal at the input will become a 1 mV signal at the output. There are many types of diff amps available .... I have used THAT1510 and THAT1512 with great success. The bandwidth of these amps is several Mhz even at gains of 1000. Noise is specified at 1 nVroot hz or better .. but I have had no need to consider this critical in this relatively simple circuit. As with conventional PIs a coil with less turns will be faster however it will be less sensitive. A further gain block could be inserted after the diff amp to compensate for loss of sensitivity with a faster coil.
A manual gain control could be introduced by varying or switching R4. The penalty would be added complexity / cost and noise.
A cap inserted in series with R4 will reduce the low frequency / DC gain to 1. This could be useful for removing slow earth field responses and low frequency hum etc.
3. The output of the diff amp is fed to the ADC input by a simple cap coupling. Microchip specify a <500 ohm source impedance for feeding the ADC input at high conversion speeds and I did muck around with some buffer amps etc however this turned out to provide the best and simplest coupling. The important bit of the output waveform is very conveniently located at approx +2 volts which is bang in the midrange of the 0 - 5 volt input of the ADC without any special clamping or level shifting. Waveforms to be posted.
4. The NMOS switch can be your favourite PI FET ( IRF740 etc etc ) however note that the voltage flyback developed across the damping resistor will only be half of that on a conventional single ended PI. This is an advantage as you can use a lower breakdown voltage FET than normal. ( and usually a lower ON resistance thus providing a higher peak switch off / saturation current. )
5. This circuit is designed for a so called differential PI coil .... I am not sure how it will behave with a conventional coil. I am fairly sure that the coil sheilding will actually be a disadavantage and pick up every AM radio station and powerline within a 100 km radius because the the input to the wideband diff amp will be unbalanced. Also conventional coils dont have the common "centre tap" so I guess it wont work anyway.
6. The front end is the important bit here. The CPU is incidental .... bolt on your favourite processing backend. It is conceivable that a conventional sample and hold / differential integrator could be easily adapted for a true "no digital bits" solution.
I guess these notes will grow with time.
moodz
picstic_Model_T.sch.zip
Notes.
1. The bias generator is referenced against VPP ( ie battery +Volts ) .... this means that as far as the differential amplifier is concerned VPP is analogue ground. The bias generator feeds the +/- 5 volt regulators which in turn supply the diff amp. In theory given the ratings of the components the DC battery supply voltage could be as high as 35 volts approx !!! The intput to the bias generator is fed by the same output as the gate drive to the NMOS FET. I did have some concern that this would impact the rise / fall ( turnoff time critical ) of the FET switch. However the impact was less than 4 ns measured on the CRO. This helps simplify and cheapen the circuit whilst synchronising bipolar supply noises.
2. The amplifier is run at its maximum specified voltage gain. ( 1000X or 60dB ) This presumably means that a 1uVolt signal at the input will become a 1 mV signal at the output. There are many types of diff amps available .... I have used THAT1510 and THAT1512 with great success. The bandwidth of these amps is several Mhz even at gains of 1000. Noise is specified at 1 nVroot hz or better .. but I have had no need to consider this critical in this relatively simple circuit. As with conventional PIs a coil with less turns will be faster however it will be less sensitive. A further gain block could be inserted after the diff amp to compensate for loss of sensitivity with a faster coil.
A manual gain control could be introduced by varying or switching R4. The penalty would be added complexity / cost and noise.
A cap inserted in series with R4 will reduce the low frequency / DC gain to 1. This could be useful for removing slow earth field responses and low frequency hum etc.
3. The output of the diff amp is fed to the ADC input by a simple cap coupling. Microchip specify a <500 ohm source impedance for feeding the ADC input at high conversion speeds and I did muck around with some buffer amps etc however this turned out to provide the best and simplest coupling. The important bit of the output waveform is very conveniently located at approx +2 volts which is bang in the midrange of the 0 - 5 volt input of the ADC without any special clamping or level shifting. Waveforms to be posted.
4. The NMOS switch can be your favourite PI FET ( IRF740 etc etc ) however note that the voltage flyback developed across the damping resistor will only be half of that on a conventional single ended PI. This is an advantage as you can use a lower breakdown voltage FET than normal. ( and usually a lower ON resistance thus providing a higher peak switch off / saturation current. )
5. This circuit is designed for a so called differential PI coil .... I am not sure how it will behave with a conventional coil. I am fairly sure that the coil sheilding will actually be a disadavantage and pick up every AM radio station and powerline within a 100 km radius because the the input to the wideband diff amp will be unbalanced. Also conventional coils dont have the common "centre tap" so I guess it wont work anyway.
6. The front end is the important bit here. The CPU is incidental .... bolt on your favourite processing backend. It is conceivable that a conventional sample and hold / differential integrator could be easily adapted for a true "no digital bits" solution.
I guess these notes will grow with time.
moodz
picstic_Model_T.sch.zip
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