Told ya I'd have more stupid questions
!
After finishing the build 'stock', I've started playing with it a bit.
So here goes...(bear with me) I am using the LME49710 in place of IC6 (the NE5534). The 49710 has 5x the GBW, 25% higher slew rate, and 38.5% lower noise/sq.rt. hZ.
So far it works great, a drop in replacement.
Part 2 - I have also replaced IC8 (the TL072/082) with the LMP7702 precision RRIO (phono/cassette head) dual opamp that has a MUCH lower slew rate, a bit over half of the GBW, but 43.5% less noise/sq.rt.hZ.
I haven't noticed a problem with the low slew rate or GBW, but I'm guessing that by this point in the circuit we're back to the 'audio' range (which is what the 7702 is designed for).
So here's the question...NOT counting the noise from passives, etc, Would the noise from these two chips average out ({38.5%+43.5%}/2) to 41% less noise (nv/sq.rt.hZ), i.e. that added by these two chips in the circuit? Told ya it was a dumb question, but I wondered how all of you designers of these things do the figuring out on stuff like this. Thanks...GTB
PS- the LMP7702 is only available in surface mount soic, I had to make a 'carrier' from an IDC header in order to place it in a dip socket. Jameco has soic to dip adapters pre-made, but at a crazy cost...

After finishing the build 'stock', I've started playing with it a bit.
So here goes...(bear with me) I am using the LME49710 in place of IC6 (the NE5534). The 49710 has 5x the GBW, 25% higher slew rate, and 38.5% lower noise/sq.rt. hZ.
So far it works great, a drop in replacement.
Part 2 - I have also replaced IC8 (the TL072/082) with the LMP7702 precision RRIO (phono/cassette head) dual opamp that has a MUCH lower slew rate, a bit over half of the GBW, but 43.5% less noise/sq.rt.hZ.
I haven't noticed a problem with the low slew rate or GBW, but I'm guessing that by this point in the circuit we're back to the 'audio' range (which is what the 7702 is designed for).
So here's the question...NOT counting the noise from passives, etc, Would the noise from these two chips average out ({38.5%+43.5%}/2) to 41% less noise (nv/sq.rt.hZ), i.e. that added by these two chips in the circuit? Told ya it was a dumb question, but I wondered how all of you designers of these things do the figuring out on stuff like this. Thanks...GTB
PS- the LMP7702 is only available in surface mount soic, I had to make a 'carrier' from an IDC header in order to place it in a dip socket. Jameco has soic to dip adapters pre-made, but at a crazy cost...
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