uPC Controlled PI

[KingJL]

Updated Files

I found that the best images with which to produce the laser prints were BMP files created at a resolution of 1200 dpi (same as the highest quality setting of my laser printer). I have included these files in the board.zip file.

I had to change the pads on the 5 pin 220 package and that changed the board and schematic files. The curent version of all eagle files are included in the TX-RX thru-hole V3.zip file.

[KingJL]

PS (+5V) Error

Changed the sequence of board population and test. Due to the arrangements of components and the ease of accessing them during assemply and test, I decided to implement and test the +5V inverter circuit first. Well, that brought to surface an error in the schematic. The 555 output being fed to the inverter transistors was being taken fron the wrong 555 pin (pin6 vs pin3). Made a ad-hoc modification to my test board and continued. 555 now outputing a square wave at 17.6 KHz to the inverter transistors. Positve 5V circuit now working.

Attached is a set of eagle files that reflect the positive 5V circuit correction.

Negative 5V is next. That SHOULD be fairly straight-forward. Will post board pictures when negative 5V completed.

Regards,
J. L. King

[KingJL]

PS complete

Finished installing components for the power supply (-5, +5, +3.3). Tesing revealed some needed changes. As a load was placed on the +5V, the voltage dropped off severely. A little trouble shooting shoed that the board layout for the PNP transistor was wrong hence it was installed backwards. Reversed the mounting of the PNP and everything much better. While I was at it I stress tested the +5V. At about 60 ma the 5V would drop slightly. Change some component values to insure that supply current would be more than adequate. Changed the resistor between the 555 output and drive transistor base input capacitors to a 68 ohm. Change the PNP to a BC327-25; changed the NPN to a 2N4401. Now we have an inverter capable of driving to 100ma!!

Changed the package definition for the PNP, and updated the schematic to reflect the changes. Updfated files are in the attached zip file.

Updated the design document to include the PS specifications. Updated document is also attached.

Regards,
J. L. King

[KingJL]

PS PIC

Picture of the board with PS installed.

Regards,
J. L. King

[KS4NS]

ExpressPCB

Hi,

Looks like a great project. I am sure I will want to build it after I finish Gary's PI. Once you get the bugs out of the layout, I would be happy to transfer your PCB layout to an ExpressPCB miniboard format and post same for all to use. I have had good luck getting people to contribute to the cost in order to get a board or trade boards for parts. It's only about $56 for three boards and the quality is great. I am not a programmer or electronics design person, but I can make decent layouts. Keep in touch. Dale

[KingJL]

The last version (and previous versions) of the design document contained the following statements:
"A diode shall be in the drain circuit of the MOSFETs, to further protect the MOSFETs and to reduce the COSS capacitance of the MOSFET seen by the TX coil (diode capacitance 20pf in series with 25pf) . Some diode candidates are: UG2005 (Diodes Inc) 20pf, or 1N4004, 1N4005, 1N4006, 1N4007 (15pF)."

The next version of the document will not contain those statements. I believe that I had mis-interpereted the results of previos experiments, and need to re-test the hypothesis. I believe I have seen the same results simply by duplicating the resistance exhibited by the diode in the drain coil path. What I had interpereted as a reduction in flyback decay due to reduced overall capacitance may simply have been a reduction in flyback decay simply because of reduced flyback voltage due to lower coil current resulting in less time that the flyback voltage exceeds the MOSFET shunt diode voltage. I need to re-run the tests with the same coil current for each test and also keeping the flyback voltage below the MOSFET voltage. Only the can we determine that the reduction in flyback decay is due to diode capacitance (which I doubt since diode capcitance is only specified/measured for REVERSE bias conditions).
Regards,
J. L. King

[Carl-NC]

JL,

I done sims on the diode idea, and also added it to a test circuit. In both cases, there is practically no difference in performance.

- Carl

[KingJL]

JL,

I done sims on the diode idea, and also added it to a test circuit. In both cases, there is practically no difference in performance.

- Carl

I can believe it! If my calculations are correct, I believe that the forward biased capacitance is roughly sqrt of Cjo (0 biased junction capacitance). That being the case, an extremely fast diode with a 25pf Cjo would have a forward biased capacitance of ~5 uF. That in series with my 45 pf of my FQPF2N60C would change the capacitance that is not measureable.

Like I said in the previous post, what I thought I saw was a manifestation of other changed parameters.

Carl, tell me if I am wrong: To attain the fastest discharge decay, I should adjust the PW t0 attain the highest current that does not create a flyback potential in excess of my MOSFET bv (in my case 600V). In my case, with a 300 uH coil and a 760 rd, that would limit me to ~1-1.1 amp.
Regards,
J. L. King

[Carl-NC]

Initial peak voltage is I*Rd, so you need a max I = 600/760 = 800mA.

[KingJL]

Initial peak voltage is I*Rd, so you need a max I = 600/760 = 800mA.

I understand that for pure LR. But on my working HH, I was seeing ~1.1-1.2 amp to get a 600V flyback spike (w/680 Rd). I think that the reason is the circuit capacitance and the leading edge voltage does not get fully developed accros Rd.

[Carl-NC]

Yes, you're right, the peak voltage is not instantaneous because the MOSFET has a linear turn-off instead of abrupt. This allows some bleed-off before the switch is fully open. It's dependent on the quality of the gate driver; put a variable series resistor in the gate and watch what happens. Furthermore, a 600V MOSFET probably clips at ~650V so you can push things a little harder. So, 1.2 amps is probably fair.

- Carl

[Carl-NC]

Eh, on the way in to work I realized that (duh) I neglected the entire mathematical response for the RLC circuit. Even with an ideal switch the peak response is not instantaneous, but occurs a little later in time and at a lower value than I*Rd. It's been many many years since I've done the math on this, so I need to review it.

- Carl

[Carl-NC]

Went back to Circuits I (literally!) and reviewed the math on critical damping. The equation for the curve is

v(t) = Io/C*t*e(-t/2RC)

where Io is the coil current at t=0+ turn-off.

If you take the derivative the the peak occurs at

dv/dt = 0 @ t=2RC

and the peak voltage is

v(2RC) = 2*Io*R*e(-1) = 0.734*Io*R

For your case, Io = 600v/(0.734*760) = 1.075A.

- Carl

[KingJL]

Populated Board

Well, all components are mounted on the board. I painstakingly checked continuity between all components as I progressed. As all of you who have done this know, two sided boards without plated thru-holes make it especially important to insure electrical connection on both top and bottom of component mounting holes.

Now on to testing everything!

[KingJL]

Well, fired up the beast! At first, no voltages except for 12V. Lost a ground somewhere! Found the lost ground; topside connection of U302 pin6. Repaired that and now we have all voltages present. Measured quiesent voltages for all TX components. The output of the ISO7220M looks questionable.

Apply ground to the two input pins that go to the ISO7220M. Everything in the TX looks acceptable. Now to hook up the uPC and check out TX. Signal looks great. The ISO7220M does a great job of shifting the level to work with the negative voltage TX.

Now to check out RX blocking circuit. The inut to the TPS2814 pins 2&3 appears to be wrong! The signal is a neagtive going signal (OK so far) going from -1.2V to -12V (should be 5V to -12v). Also notice that the 2N3904 is stretching the PW of the blocking signal by ~2.5usec. I find that the Eagle libraries package for the 2N3904 have the pins reversed. I fix the package and also change the transistor to a 2N5088. Now the blocking signal to the TPS2814 goes from 5V to -12V. Outputs to from the TPS2814 to the MOSFET gates are correct. The 2N5088 only stretches the signal by .5 usec. The 3904 is too slow for use in a high speed switch circuit.

Something in the blocking circuit is not functioning properly as I have a +5V with negative going (-12V) signal at the drain of Q301. Well, I have the orientation of BOTH MOSFETS in the RX blocking circuit reversed. Reverse the 2 MOSFETS and retest. RX blocking appears to be now working. I believe I have to find another P-channel MOSFET for the RX block. There appears to be too much capacitive coupling of the gate signal to the output. I get about a 100mv leading and trailing edge spike. I will research this to see if there is a better component for this.

The timing circuitry for both the TX and RX seem to be working as intended (except for the feedthru of th RX block gate signal). This checks out the digital section and the uPC interface.

Next is to check the analog portion (RX front-end).

Attached is the updated eagle files and the board layout bmp files that include all corrections to date.

Regards,
J. L. King