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  • #91
    Originally posted by Teleno View Post
    So what about the preamp?
    Has somebody bread-boarded Teleno's front-end? It definitely should be tried.

    Comment


    • #92
      Originally posted by Monolith View Post
      Has somebody bread-boarded Teleno's front-end? It definitely should be tried.
      Reply #6?

      Comment


      • #93
        Originally posted by green View Post
        Reply #6?
        Yes, that is what I had in mind. Sorry, my bad memory has cheated me again. This is only a damping circuit.

        Teleno, why don't you show us your pre-amp circuit? We could breadboard it together with your damping circuit.

        Comment


        • #94
          Originally posted by Monolith View Post
          Has somebody bread-boarded Teleno's front-end? It definitely should be tried.
          Here's my theoretical preamp design for wohever wants to try it out.


          Characteristics (theoretical):
          Gain: 23
          Input noise: 3.7nV/sqr(Hz) (2.3 uV total in the band 1KHz - 700KHz)
          Current consumption: 3mA.
          Output with no signal: 2.23V

          Explanation:

          D1: Absorbs flyback, dimension according to expected current.
          D2: prevents the emitter-base of Q1 from being damaged by reversed voltage.
          D3/R3: polarizes Q1 working point at Ic = 100 uA.
          R1: damping resistor, a bit lower than its theoretical value.
          R2: gain resistor. Gain is aprox. R2/R1.

          Avatantages realtive to traditional R/D:

          High gain,
          Damping and preamplifying in one single step for less noise.
          Lower than theoretical damping resistor contributes less noise.

          Disadvantages:

          3 mA consumption.
          Baseline not zero (still achievable by negative voltage rail on R2's end.)






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          • #95
            What is VN ?

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            • #96
              Nice work Teleno, but I have to ask, what happens to this massive pulse that D1 "absorbs" surely that is relying on a power supply with 0R impedance ? Would it not be better to put another diode with the cathode to D!/D3 junction and a nice hefty electrolytic to ground from that point or else I feel that the supply quality will suffer.

              Please advise on your thoughts regarding this.

              I intended my suggestion to be a method for capturing the Rx signal for analysis, NOT for use in the final design. Sorry I didn't make that clearer. My Bad.

              Comment


              • #97
                Originally posted by Sean_Goddard View Post
                Nice work Teleno, but I have to ask, what happens to this massive pulse that D1 "absorbs"
                The pulse is exactly the same as the one absorbed by the diode in the traditional R/D design.

                I'm assuming sufficienty dimensioned electrolytic capacitors are already connected to the power supply, just like in the normal design.

                The .ZIP file contains the .asc simulation file for LTSpice. Feel free to experiment with modifications.

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                • #98
                  Originally posted by 6666 View Post
                  What is VN ?
                  It's a dummy voltage source for noise analysis. You can ignore it (short circuit).

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                  • #99
                    Fair enough. I just realise that sometimes simulations don't necessarily translate into real life.

                    I tried changing the pulse width on your sim to incorporate the energy saving system I designed which measures the coil current and when there is no more di/dt it shuts the pulse off (as maximum I coil has been achieved). But is stops working. I know my circuit works so I took it out and just left the changes pulse width. Still Nada!

                    I still love this preamp design though, it's simple, cheap and very effective. Maybe it's why the late Great Andy Flind favoured it for some of his designs.

                    Comment


                    • This preamp is fast, has a high gain (100 x), low output impedance and a good rejection of power ripple (58 dB).
                      Input noise is 2.7 uV in the range 1 KHz - 700 KHz.

                      D1 can be any schottky diode > 200mA and forward voltage as low as possible (e.g. BAT46WJ)

                      Adjusting procedure:
                      - Trim R3 to get anything between 100 uA - 140 uA going through the damping resistor R1.
                      - Adjust the baseline by R6 to a minimum of 600 mV - 700 mV at "vout".

                      Optional:

                      - Achieve lower (higher) gains by decreasing (increasing) R2.

                      .ZIP attachment contains LTSpice simulation file Preamp_geotech_2.asc





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                      • Originally posted by Sean_Goddard View Post
                        I still love this preamp design though, it's simple, cheap and very effective. Maybe it's why the late Great Andy Flind favoured it for some of his designs.
                        Do you have a pointer to such a design?

                        Originally posted by Sean_Goddard View Post
                        Fair enough. I just realise that sometimes simulations don't necessarily translate into real life.

                        I tried changing the pulse width on your sim to incorporate the energy saving system I designed which measures the coil current and when there is no more di/dt it shuts the pulse off (as maximum I coil has been achieved). But is stops working. I know my circuit works so I took it out and just left the changes pulse width. Still Nada!
                        Can't really comment without seeing your circuit.

                        Comment


                        • Another preamp for brainstorming. All criticiss, suggestions, improvements ... and breadboards! are welcome.

                          Actually this is a two stage: preamp + amp.

                          Design priorities: high speed and gain, insensitivity to power ripples.
                          Compromises: current consumption and noise. Both held as low as possible without compromising the priorities.

                          This is version has a gain of 1,000 and 2.6 mV output noise. Input noise is 3.3 uV. It consumes 8.7 mA.

                          Q1 and J1 added for common mode rejection (power line ripples).
                          Second stage Q4 - Q7 added for extra gain.
                          Current source J3 corrects the baseline, which should be about 600mV.

                          .ZIP attachment contains LTSpice simulation file.

                          Copyright: Oscar Gonzalez.



                          Attached Files

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                          • If we can turn that into a reality, then the problem of thin gold not being detectable is cracked. That amp is F A S T:......!

                            Is the noise figure one you put in or a calculated one?

                            I can but marvel at what you are doing as this depth of analogue design is outside my sphere of current abilities. But I think we have a winner in the input amplifier stage design. My only comment is that I think a gain of 1K is a little high, in order to use this in Oz it will have to be a lot lower.

                            Now something else not mentioned here, what about saturation and recovery? From what I see there is no problem with this with respect to this design. Does this mean it ois NOT a problem now?

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                            • Simpler version with a bit less noise.

                              Vout reflects the signal as seen by the ADC of an AVR micro (ATMega, ATtiny,etc.).

                              Copyright: Oscar Gonzalez.





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                              • Originally posted by Sean_Goddard View Post
                                If we can turn that into a reality, then the problem of thin gold not being detectable is cracked. That amp is F A S T:......!

                                Is the noise figure one you put in or a calculated one?

                                I can but marvel at what you are doing as this depth of analogue design is outside my sphere of current abilities. But I think we have a winner in the input amplifier stage design. My only comment is that I think a gain of 1K is a little high, in order to use this in Oz it will have to be a lot lower.

                                Now something else not mentioned here, what about saturation and recovery? From what I see there is no problem with this with respect to this design. Does this mean it ois NOT a problem now?
                                Noise as calculated by LTSpice.

                                Saturation is not a problem now.

                                Reducing R11 reduces gain. Easy calculation: gain = 1,000 x R11 / 50K

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