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; Timer/Counter2 Output Compare Match interrupt request service routine
ISR_TIM2_COMP:
out TCCR2, PI_ZERO ; (1) disable timer 2 (PI_ZERO:=ZH=0)
; External INT0 interrupt request service routine
ISR_EXT_INT0:
_next_cmd:
ld ZL, X+ ; (2) load command
; jump to command vector
ijmp ; (2) + (2) for another rjmp in the command vector
//CMD_RETI: return from interrupt (continue with next cycle)
Cmd_Reti:
reti ; (4)
;------------------------------------------------
//CMD_NOP: no operation
Cmd_Nop:
rjmp _next_cmd ; (2)
;------------------------------------------------
//CMD_ST: store data to direct address, parameter: 8-bit Addr, 8-bit data
Cmd_St:
ld PI_Addr, X+ ; (2) get short address
ld PI_Param, X+ ; (2) get data
st Z, PI_Param ; (2) IO = data
rjmp _next_cmd ; (2)
;------------------------------------------------------------------------
;------------------------- Interrupt Vectors ----------------------------
;------------------------------------------------------------------------
;------------------------------- RESET ----------------------------------
; External Pin, Power-on Reset, Brown-out Reset, and Watchdog Reset
.ORG 0
rjmp ISR_RESET
;-------------------- External Interrupt Request INT0 -------------------
; Triggers PI Cycle Begin
.ORG INT0addr
_next_cmd:
ld ZL, X+ ; (2) Load command
; Jump to command vector
ijmp ; (2) + (2) for another rjmp in the command vector
;-------------------- Timer/Counter2 Output Compare Match ---------------
; Timer/Counter2 Output Compare Match interrupt request service routine
.ORG OC2addr
out TCCR2, PI_ZERO ; (1) disable timer 2 (PI_ZERO:=ZH=0)
; Note: the following commands will overwrite the OVF2addr interrupt vector
; OVF2addr vector is not used, same ISR routine as for INT0 follows
ld ZL, X+ ; (2) Load command
; Jump to command vector
ijmp ; (2) + (2) for another rjmp in the command vector
;------------------------------------------------------------------------
;.. op-code routine..
;
; command prefetch (same as ISR routine at INT0)
ld ZL, X+ ; (2) Load command
ijmp ; (2) Jump to command
//CMD_NOP: no operation
.ORG Cmd_Vector+CMD_NOP
ld ZL, X+ ; (2) Load command
ijmp ; (2) Jump to command
//CMD_RETI: return from interrupt
.ORG Cmd_Vector+CMD_RETI
reti
// r0..r14: application #define PI_tmp r15 // temporary register for execution // r16..r23: application #define PI_Param1 r24 // Parameter 1 #define PI_Param2 r25 // Parameter 2 #define PI_Param PI_Param1 // Single parameter register #define PI_PCL XL // PI op-code lo-program counter #define PI_PCH XH // PI op-code hi-program counter #define PI_PC X // PI op-code program counter #define PI_AddrL ZL // Lo-Address (must be ZL) #define PI_AddrH ZH // Hi-Address (must be ZH) #define PI_Addr Z // Address (must be Z) #define PI_ZERO PI_AddrH // Zero value register
// op-code instruction prefetch macro
.MACRO CMD_PREFETCH ; (4) Prefetch next op-code and decode macro
ld PI_AddrL, PI_PC+ ; (2) Load command
ijmp ; (2) Jump to command
.ENDMACRO
//... interrupt vector table
;-------------------- External Interrupt Request INT0 -------------------
; Triggers Command Execution for Cycle Begin
.ORG INT0addr
_next_cmd:
CMD_PREFETCH ; (4) Prefetch next op-code and decode macro
;-------------------- Timer/Counter2 Output Compare Match ---------------
; Timer/Counter2 Output Compare Match interrupt request service routine
.ORG OC2addr
out TCCR2, PI_ZERO ; (1) disable timer 2 (PI_ZERO:=ZH=0)
; Note: the following commands will overwrite the OVF2addr interrupt vector
; OVF2addr vector is not used, same ISR routine as for INT0 follows
CMD_PREFETCH ; (4) Prefetch next op-code and decode macro
//... other interrupt vectors
; PI op-code command vector table begins
Cmd_Vector:
//... somewhere below address 256
//CMD_SWAIT: active short wait, parameter: 8-bit delay counter
.ORG Cmd_Vector+CMD_SWAIT
rjmp Cmd_SWait ; (2) jump to op-code execution routine
//... other op-code vector jumps to the execution routine or direct vector implementations
//... somewhere above address 256
//... execution routines and other firmware code follows..
//CMD_SWAIT: active short wait, parameter: 8-bit delay counter
; pure execution clocks: 1+n*3
; +2 for indirect vector coding at decoding
; +4 for op-code decoding
; total execution clocks: 7+n*3, (16 MHz: max. 48 µs) (n=0 -> n=256)
Cmd_SWait:
ld PI_Param, PI_PC+ ; (2) get delay counter
Cmd_SWaitLoop:
dec PI_Param ; (1) counter--
brne Cmd_SWaitLoop ; (2) for branch, (1) for loop end
; execution ends here (cpu clocks not taken into the calculation)
CMD_PREFETCH ; (4) Prefetch next op-code and decode macro
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