PI active damping

[Davor]

Teleno, I think you are missing a few details.

In a schematic you supply the ground is referenced to a negative side of power supply, yet the part of a coil that has a minimum AC excursion is the top of a coil, which is supposed to be a signal ground. Which it isn't because of R12. It can be fixed by moving R12 in series with MUR460.

Next, you are using a n-channel MOSFET connected between a hot end and a negative rail. It is a bad choice mainly because of the offset which you compensate with a Zener. For a Zener to operate - as a Zener - you need some current flowing through it. Without current it acts as a simple diode with a very high impedance and some small leakage current. You left some headroom to enable current flow, but in effect you got yourself a nice avalanche diode noise source and a plethora of other problems. It can be fixed by placing the MOSFET upside down across a coil, with R6 as a source degeneration resistor, and not in drain like now. It would require a separate gate positive offset or using a depletion MOSFET, which is not common at all. You may seek BSP135 to learn more about those. The only downside of this approach is that the current through this device is limited only by R6 during charging, but that's not much. Even with a relaxed gate offset of Vgso+1 you can get a very easy and decent way of adjusting critical damping with a convenient multiturn trimmer, as no high voltages or currents will ever appear across it.

[Teleno]

Teleno, I think you are missing a few details.

In a schematic you supply the ground is referenced to a negative side of power supply, yet the part of a coil that has a minimum AC excursion is the top of a coil, which is supposed to be a signal ground. Which it isn't because of R12. It can be fixed by moving R12 in series with MUR460.

Next, you are using a n-channel MOSFET connected between a hot end and a negative rail. It is a bad choice mainly because of the offset which you compensate with a Zener. For a Zener to operate - as a Zener - you need some current flowing through it. Without current it acts as a simple diode with a very high impedance and some small leakage current. You left some headroom to enable current flow, but in effect you got yourself a nice avalanche diode noise source and a plethora of other problems. It can be fixed by placing the MOSFET upside down across a coil, with R6 as a source degeneration resistor, and not in drain like now. It would require a separate gate positive offset or using a depletion MOSFET, which is not common at all. You may seek BSP135 to learn more about those. The only downside of this approach is that the current through this device is limited only by R6 during charging, but that's not much. Even with a relaxed gate offset of Vgso+1 you can get a very easy and decent way of adjusting critical damping with a convenient multiturn trimmer, as no high voltages or currents will ever appear across it.

I appreciate very much your detailed comments. I'll go a bit into them.

You're right, R9 is misplaced. Actually with BS170 you don't need it because it's RDSon is about 12 ohms.

Regarding the CC MOSFET, the D-S recirculation diode would conduct a high current when the driver MOSFET is on. You can block it by adding a diode in series but that causes ringing at the end of the flyback transient when the diode is high impedance.


Another option is what I did - referencing the CC MOSFET to ground - but this requires a level shifter to maintain the voltage at the coil a little below V3 when the CC MOSFET is at lowest resistance (end of flyback). I used a zener for ease of simulation but it can be anything with a constant voltage drop between terminals (but is must react fast).

A third option is connecting the source of the CC MOSFET via a diode to a voltage source a little under V3. This way the two requirements are fulfilled: the diode is never closed and the D-S diode cannot conduct.

As to placing R6 as a source degeneration resistor, a current source of 0.5A would require a gate voltage over 50V.

My target is 100 ohm resistor at near-zero coil current (milliamperes) and the CC MOSFET sinking about half the top coil current. This way ringing is avoided and the coil does not end up shorted so you can measure the voltage signal.

[Davor]

Actually you want a constant current thing start clipping at about 1V, and if a damping resistor is at 1k, your goal current is 1mA.
Try not to involve any level shifters as they do not work well with analogue circuitry. A slight change in offset will obliterate all weak signals.

[Teleno]

Actually you want a constant current thing start clipping at about 1V, and if a damping resistor is at 1k, your goal current is 1mA.

Let's say instead of damping we short the coil at zero crossing. The current swing almost doubles (from 1.5A to 2.1A) in the shortest possible time and in a linear discharge, followed by a slow decay to zero at V/L*t. The signal induced in the target at goes from 45mV to 72mV. It's a lot of gain, but the only way to measure it is an Rx coil because the Tx coil is shorted. Depending on coupling coefficient the Rx coil could spoil the whole scheme.

These are the coil currents, L4 is shorted at zero-crossing, L6 is just critically damped.



These are the target signals:



Voltage across L4 is zero, no way to measure the target's response in L4. Only way out is an Rx coil.

[Davor]

With voltage input Rx a short circuit is meaningless in case of a monocoil. IB configuration is a completely different animal, and it makes a lot of sense.
For the sake of this topic, let's stick to the monocoil for a little while.
Input referenced voltage noise is your measure how deep your detector will go, and it is referred to a source resistance, and not Rx input impedance. It is beneficial when a low impedance source is connected to a preamp of adequate noise performance, but also of high input impedance. The best noise performance is NOT achieved by matching impedances.

[Davor]

I quickly combined MOSFET active damping (as I explained earlier) with a accelerating diode and also my damping circuit, and got exactly the same response as with only a diode. My conclusion is that active damping is a waste of time, especially if gate is driven by any kind of decaying voltage, as it screws up small signals.

[Teleno]

Here's a good paper on amplifier noise:

Noise Analysis in Operational Amplifier CircuitsCiteNPLDOCSCiteNPLDOCSCiteNPLDOCS



A faster transient allows for early sampling and better signal/noise.

Now my suggestion to reduce transient time:

Damping theory is based on continuous function analysis (poles and zeroes). As such, the R-value for critical damping is continuously applied all the way from the beginning to the end of the transient.

This is not the best approach because the ringing-danger zone is where current approaches zero. The damping resistor is counter-productive at the beginning of the transient and only worsens the rise time. We want the best od both worlds: a faster rise time and a "smooth landing" free of ringing. We can achieve both by connecting the damping resistor only after the transient voltage has reached its peak.

The improvement looks like this:



Green trace: damping resistor connected after the peak. Blue: usual damping.

Slight improvement of target's response:



This small improvement comes free of instabilities and it only requires a timed switch to turn the R on.

[Davor]

Unfortunately the approach is misleading. To grasp it better try observing results in log voltage (or current) scale. You'll be able to observe that the very flyback is the short-lived in comparison with the coil in parallel with any sensible damping resistor. You can't avoid that slope, nor you can shorten it by active damping, because the coil slope starts below 0.1V and runs its course. Target responses fork from this slope, so for a lower level target signal you have to start sampling later. With 300uH and 100p in parallel (a fast-ish coil) and proper screening of MOSFET capacitances, you may start sampling at 15us or so if you are after deep targets. There is no problem to start sampling much sooner if deep targets are of no concern for yours.

[green]

I'm thinking you can start sampling when the amplifier comes out of saturation if it's repeatable It seems it would be better if the non target current is close to zero. My testing on the bench shows it's not critical. Most amplifier gains range between 100 and 1000. With a gain of 1000 and R damping = 1000 ohms, 1 u amp coil current = 1 volt at amplifier output. It would be good if the no target coil current was less than 10 u amps, probably closer to 1 u amp. I've been trying to get a CC damp to work. I think CC might be better but I'm not having any success. Including LTspice simulation of critical damped coil (coil resonance = 1 Mhz) with two different targets.

[Davor]

If allowed to oscillate at the beginning, the active damping may prove useful after all. Point is that even though flyback finishes with a slight overshoot, the damping becomes critical and the subsequent oscillations become effectively snuffed. The circuit here also contains a snubber, and a gradient current compensation circuit.

[green]

Liked Davor plot with a log y scale. Plot the same as reply #24 except for log scale. Had to add R3 to get current to damp closer to zero. The circuit damped to a constant value without it, so it's only needed when plotting a log scale. D1, D6, D4 and D3 are added to the circuit to clamp the decay near 400 volts to match the IRF740 I use on the bench circuit.

[Teleno]

Now a funny matter. I've modeling the coil's parasitic capacitance and resistance in LTspice as discrete components. When I switched to the internal LTspice model (filling in the R anc C values in the inductance component form) my circuits started behaving strangely. The discharge is no longer a ramp, but a zig-zagging nightmare.

Check these pics below to see wht I'm talking about. I have no idea of what's going on! Can someone provide an explanation?



The "bulge" in the ramp of L1, where does it come from?

Edit: OK i got it. In the lumped mode can't the current in the inductor's windings is not separatels visible anymore, but in combination with the current of the parasitic capacitor. I coupled a second coil as a "scope" and the induced voltage decay was smooth too. This coil model is not practical when you actually need to visualize the current inside the windings.

[Davor]

You can always hover the mouse on a wire you wish to see current going through (voltage probe appears), press "Alt" an the voltage probe changes to current probe. Voilà.

[Qiaozhi]

OK i got it. In the lumped mode can't the current in the inductor's windings is not separatels visible anymore, but in combination with the current of the parasitic capacitor. I coupled a second coil as a "scope" and the induced voltage decay was smooth too. This coil model is not practical when you actually need to visualize the current inside the windings.

In reality the series resistance and parallel capacitance of the inductor are distributed, whereas the LTSpice (and your own) are both lumped models. Although the use of a lumped model allows you to monitor the current through the ideal inductor, the result is meaningless.

[Teleno]

Although the use of a lumped model allows you to monitor the current through the ideal inductor, the result is meaningless.

I've been looking for models of real inductors and all I could find were lumped models:

Using Coilcraft's Advanced Models in LTSpice

Modeling Non-Ideal Inductors in SPICE - Intusoft

Now if I understand correctly, all the current that flows into the lumped model is actually flowing through the windings and contributing to the magnetic field.

The magnetic field would be then the sum of the currents in the distributed capacitor and in the ideal coil.

The "elbow" in the transient would then be what the real magnetic field looks like (oh s***!).

However, when I couple the lumped inductor to an ideal inductor to see what the induced voltage is, the "elbow" is not there. So I assume LTspice only couples the current flowing through the ideal inductor, not through the whole of the lumped elements. Is this a "bug" in LTspice or is it the way it should be?



I(L7): total current flowing in/out of the lumped inductor model with 40uH, 40pf, 0.8Ohm (elbow present)
Blue line: induced voltage into a coupled ideal inductor of 0.01uH (no elbow)

Quite confusing!