OK, so what we need here is a noise analysis of the input signal after the 1uF capacitor. See this article on how to use PSPICE for this - it is not easy to measure noise; simulating it is easier.. and it is impossible to guesstimate it.
The most important part of the system will always be the LNA at the start -the first stage. If that has a gain of 1000x then any thermal / bias noise will be multiplied by that much as well as the signal. The gain of the stages that follow are not so important as the discrimination between signal and noise takes part in the first stage.
For an ultra low noise stage, you cannot beat a single transistor, preferably a buried channel type like a HEMT (did my PhD on them, lovely devices!).
The most important part of the system will always be the LNA at the start -the first stage. If that has a gain of 1000x then any thermal / bias noise will be multiplied by that much as well as the signal. The gain of the stages that follow are not so important as the discrimination between signal and noise takes part in the first stage.
For an ultra low noise stage, you cannot beat a single transistor, preferably a buried channel type like a HEMT (did my PhD on them, lovely devices!).
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