GOLDSCAN 5 SCHEMATIC QUESTION

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Ivconic contributed NOTHING to this forum? Really? No wonder he left. Many others have made countless and valuable contributions to forum. That is not disputed. I only mentioned ivconic because he no longer is here and some of us greatly appreciated his efforts and help. GMT King cobra is excellent piece of reverse engineering so kudos to you. For me using altium to design small single side dip PCB is like using 3D printer to make paperclip. Sprint layout might seem primitive but to make paperclip all you need is piece of wire.

[WM6]

Agree. We should not measure someone work by personal intolerance.

[kt315]

Well mens,
I give to the forum the GS4 schematic and the Baracuda pulse detector that i myself reengineering ...it is the only way to have the circuit good design.... if i will have the GS5 in my hand i will make the same work

You did an excellent job Alexis. but i ask you to give more pics of a board in high resolution. try to distribute
the work between active GT members.

[eclipse]

Actually the schematic works, kind of.

I have voltage drifft issue right now (after detection signal voltage driffts to +5v) but I guess this is normal - I haven't installed 2x470K + 5M6 resistors.

Adjusting all 50K trimmers is a bit hard. For 2nd attempt to build this section I didnt stuffed those. Also GB section is not stuffed.

Audio is a bit iffy. Probably output voltage is not optimal for this audio and may need adjusting.

This section is not working correct in my build, you can try on yours but I couldn't get it work fine. (I've changed values of R22 - 10K, R2 - 10K)

[dbanner]

Somewhere earlier in this thread someone mentioned this correction. This point should read -5volts?

[eclipse]

Yes ive connected it to -5V. On the op amp output there voltage should be around -4.3V, im getting -3.8V

[Jose]

For adjusting the setting to "0" volts, the gates of the J113 should be connected to GND, the same as the GS4.
Leg 3 adjusts to a few millivolts negative, just when the AOP changes at the exit, leg No. 1 and walks in the values mentioned, around 4 negative volts, (1/4 LT1114)
The integrated figure TL052, in some photo I saw it as TLC2262.
The sequence of pulses, from the time base, with the integrators seems to be wrong. Compare with the GS4 scheme.
Jose

[dbanner]

Yes. I think sequence is wrong. I compared to GS4 schematic. I made correction to GS5 schematic, I think it should look be like this:

[Jose]

Yes. I think sequence is wrong. I compared to GS4 schematic. I made correction to GS5 schematic, I think it should look be like this:

I hope I'm not wrong, but in your scheme it should be:
A ... corresponds to B.
B ... corresponds to A
D ... corresponds to C.
C ... corresponds to D.
In GS4, the first pulse corresponding to the delay enters through the non-inverting input, (+).
In the GS5, the mentioned pulse must enter through the inverting input (-).
Is that the integrator of the GS4, is different from the GS5.
Please check, and have someone tell me if I'm wrong.
Jose

[eclipse]

On my GS4 build which im working on in parallel with this I used same integrator as this one and it all worked. Timings are as follows:
Sample1 going to Channel 1 (main) +
Sample2 going to Channel 2 (gb) +
Sample3 going to Channel 1 (main) -
Sample4 going to Channel 2 (gb) -

This same scheme im using for GS5.

Looking at the photos I think some components are not shown in the drawings, I guess its not that complete.

Im thinking just to get the things going you can connect the output of the op amp going through 10k to the summing op amp stage to GND, thus not using the entire GB channel so you dont need to stuff those parts right away. This way you can check with less components whats going on with the main channel, hopefully get it going.

[eclipse]

For example don't you guys think there should be a cap (47-100nF) on these 2 spots:

[Jose]

For example don't you guys think there should be a cap (47-100nF) on these 2 spots:

I think the important thing is that we have a positive value signal in the output of both channels, when a metal is approaching the coil.
In the case of the GB or Iron channel as it is usually called, this signal must be measured before the reverse stage.
With respect to the capacitors in GS5, in IC2.2; IC2.3, I think it should not exist because it would create different integration times, since in the GB channel, the gain is adjustable.
Unlike GS4, the gain in both channels is fixed.
The other capacitor in IC1.1, would not know what to answer.
Jose

[eclipse]

You are right, C8 should not be used. Now for the C9 I guess it wont hurt to try to see any good - there's a capacitor on this photo 47nF which I don't think is accounted for in the circuit and it's in the vicinity of this op amp: http://www.geotech1.com/forums/attac...8&d=1498826015

[dbanner]

Here are some pics of original GS5 issue 1 mainboard. The audio board is a seperate circuit board. I have some more pics somewhere but can't seem to find them right now. As for timing sequence, A goes to inverting(-) input, and the rest you can see from the GS4 schematic.

[dbanner]

I also see TLC2262 on original instead of TL052 on schematic.