Originally posted by Mdtoday
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New Bipolar Boost TX and Front End
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Thanks JL,
A couple of things to tidy up and I'll post the Kicad files later today for you to have a look at and if all looks ok, Ill place an order.
1)The input and output tracks to the switch mode will be changed to rear side of board so the shielding will be more effective.
2) Provisions made for extra filter Cap on output of the MT3608
3) Finish via stitching of the ground planes
cheers
Mdtoday
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JL, I have also designed another version of your Probe/coil switch.
A fly-back diode option has been added, if its required
It now has 2 pcbs and provides easier assembly with more room for JST connectors and wires.
The rectangular version causes mating connector/wires to be at tight angles in the connector bay..its fine in the main enclosure though.
The 5 pin connector board and probe board is configured with either JST or solder pins in J3 or J4 positions depending which bay the boards are mounted in the housing.
We have 2 options now with this one ...
I will post the Kicad files later along with assembly view
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Originally posted by Mdtoday View PostJL, I have also designed another version of your Probe/coil switch.
A fly-back diode option has been added, if its required...
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Originally posted by KingJL View PostI actually had considered using one in my original design. I could not find any recommendation in any documentation. I suspect that it is internally protected as the 2 energizing contacts are polarized. But in the end... it can't hurt or "better safe than sorry".
When we are ready, I will order these boards + the power board together
Then Ill have to order some relays.
I haven't done anything more on the main enclosure but will get back to finalising that soon
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Originally posted by Mdtoday View PostYes, I had a look at data too and could not find much on it either, so thought I would just include the option in case.
When we are ready, I will order these boards + the power board together
Then Ill have to order some relays.
I haven't done anything more on the main enclosure but will get back to finalising that soon
probe relay.pdf
I used a 20V 500ma schottky diode for the flyback protection in the schematic, but that can be changed as you see fit.
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Originally posted by KingJL View PostSince we are changing the probe relay circuit, I was a little uncomfortable with the emitter follower configuration. I was concerned that the 1.8K base resistor was not high enough to ,limit the current sufficiently from the 3.3v FPGA pin. In the emitter follower circuit, any increase above 1.8K brings the voltage across the coil below the specification minimum voltage. I propose the following circuit configuration (flyback protection included). It allows use of 5K in the FPGA/base current path and maintains the voltage across the coil within specifications.
[ATTACH=CONFIG]47331[/ATTACH]
I used a 20V 500ma schottky diode for the flyback protection in the schematic, but that can be changed as you see fit.
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Progress!!!
Made major moves forward this week. Developed a parameterized interface peripheral ip to control the Xilinx CIC ip. Now if we decide to change the number of channels, input width, or output width all we need to do is change the parameters of the IP rather than having to edit and repackage the ip. Used this ip to add 3 CIC filter peripherals to the design. All interrupts are functioning as desired. The embedded processor is now interrupted when data is available from the RX, target CIC filter, sample_0 CIC filter, mineralization CIC filter, and all user input actions. The upc does not spend any time polling for any data. And all filter processing of data is offloaded to concurrent processing peripherals.
The previous problems encountered with not getting RX interrupts was really a blessing in disguise... I just wish it had not taken 2 weeks of excruciating mental stress. The current design allows much more flexibility in use and function of the filter processing and actually opens up new opportunities/options. The Target CIC filter is a concurrent 3 channel (for S1, S2,S3 samples) programmable rate filter and provides the first stage of processing of the target data. The S0 filter is a single channel programmable rate CIC filter and is used for tuning/adjusting damp timing and also for obtaining the RX offset compensation. The mineralization filter is an extremely slow (ranges from 0.333 Hz - 0.005 Hz) 3 channel programmable rate filter that takes the output of the target CIC filter.
There only 2 hardware definitions left to integrate into the design. (1) A 2 channel (for samples 1 & 2) 16 tap finishing FIR filter that will both sharpen/narrow the passband and compensate for the unlinearity of the passband of the CIC filter processing. (2) An audio peripheral that will provide a 1 bit DAC audio out signal based on the digital voltage signal.
After those 2 modules are added, we can focus on the code to tie everything all together.
The current design:
Change log:
Change Log.txt
Current project archive is Vivado_Bipolar_PI(10-6-2019).zip
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