My current version of the TX circuit
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PI metal detector for really small nuggets
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Originally posted by eclipse View PostMy current version of the TX circuit
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IC2 overheats and dies /magic smoke/. Tx is ON for 100us in 1ms cycle. Sync is altering - one cycle (1ms) is low and the next (1ms) is high.
TX1 is ON one cycle, TX2 is ON the 2nd cycle, then repeat.
I've made small delay for TX ON (2us) to make sure we're not rushing to turn on the N mosfets too soon but I didn't help.
SIM.zip
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Originally posted by eclipse View PostIC2 overheats and dies /magic smoke/. Tx is ON for 100us in 1ms cycle. Sync is altering - one cycle (1ms) is low and the next (1ms) is high.
TX1 is ON one cycle, TX2 is ON the 2nd cycle, then repeat.
I've made small delay for TX ON (2us) to make sure we're not rushing to turn on the N mosfets too soon but I didn't help.
[ATTACH]54641[/ATTACH]
[ATTACH]54642[/ATTACH]
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I have level shifter to shift +3V3/GND from the MCU to GND/-BAT
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Originally posted by eclipse View PostI have level shifter to shift +3V3/GND from the MCU to GND/-BAT
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My currently preferred method of driving an H-Bridge is with analog switches. While you can use 4053-types the DG469 is my favorite, 6 ohms max and up to 44V on the rails. Yes, I have run the TX supply that high. And the logic input is 3V-compatible. No level shifting or translation required.
There is a simple way of getting rid of the SPDTs on the NMOS devices, bonus points if anyone figures it out.
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I have not had experience with H bridge circuits in a PI, but a couple of points may be relevant. It is not marked on the schematic, but are Q3 and Q4 IRF530's? If so, all devices are BD(Vdss) of 100V and all will be subject to avalanche conditions, subject to coil data. I have learned quite a bit about avalanche in Mosfets just lately and generally speaking many papers say it is a condition best avoided. The nearest equivalent I have is a P7N10 which is also a 100V device. My coil and cable is 5.8ohms and the inductance is 330uH. Supply volts is 12V and max pulse current is 1.8A. With 100V breakdown the device takes 7uS to switch to zero current, which is slow for PI. This might have implications for an H bridge circuit and cause overlap between the two states.Notice the long plateau on the green trace at 100V; taken with a x100 probe. Compare with a 500V device P9N50
. It still avalanches, but only for a short period and switchoff is about 2.5uS.
The other point which KingJL may have alluded to is what is called 'shoot through'. When, say, Q2 and Q4 turn off the high voltage will appear on the drain of Q3. This will be coupled via Cgd and turn Q3 on. Quite what will happen with the avalanching noise is anyone's guess, but likely the flyback voltage, will find its way to pin 7 of the driver. Same situation for the other side. Would not suitable zener diodes across all 10K resistors be an idea worth trying?
There is quite a bit of information on the Internet by Googling 'H-bridge driver with shoot through protection'. In the worst case, everything smokes. There are, however, drivers that have protection.
Eric.
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I've came up with these improvements, based on your feedback, I will try those next:
* Switch TX (N mofsets) 10uS after the P switches /currently 2us/
* Protection diodes on driver outputs
* Alter turn on/off times for P switches to avoid overlap (slower turn on, faster turn off) with antiparallel diode on the mosfet gate resistor
* Decoupling caps for both mosfet drivers /currently lacks of any/
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