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Is IRF9640 the best choice for a high-side switching topology?

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  • #46
    The pulsed supply V2 swings from GND to VPOS ( eg 12 volts ) the diode pump inverts the pulses so that we can get -12 volts.

    C1 ane D2 are the diode pump driving the source of M1 ... the " voltage multiplier is by -1 ( 12 volts x -1 = -12 volts ).

    The pulsed supply must swing from GND to VPOS. ( ie you cant just turn the supply on and off ).

    This circuit can achieve nearly 90% efficiency with common components.
    If you use another MOS switch for D2 the efficiency can reach over 95%.

    its easy to get peak amps ( eg 3 amp drive ) from this circuit.

    moodz
    Last edited by moodz; 08-28-2023, 10:24 PM. Reason: typo

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    • #47
      Thanks for the circuit and the explanation moodz, but I must admit that this sounds way out of my expertise and it wasn't obvious when looking at the circuit aside from the pulse at the drain and tying gate to ground. Ill put this into LTSpice and see if I can figure out what you're suggesting.

      "The pulsed supply must swing from GND to VPOS. ( ie you cant just turn the supply on and off ).​:

      Are you saying that some kind of slew rate is required for it to work? Presumably that's based upon the value of C and the diode?

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      • #48
        Also, not sure if it's possible on this forum but any chance that you could share the LTSpice model? I'd like to measure your exact circuit.

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        • #49
          here is the sim file ...
          pump.zip
          moodz

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          • #50
            Originally posted by CrizzyD View Post
            Thanks for the circuit and the explanation moodz, but I must admit that this sounds way out of my expertise and it wasn't obvious when looking at the circuit aside from the pulse at the drain and tying gate to ground. Ill put this into LTSpice and see if I can figure out what you're suggesting.

            "The pulsed supply must swing from GND to VPOS. ( ie you cant just turn the supply on and off ).​:

            Are you saying that some kind of slew rate is required for it to work? Presumably that's based upon the value of C and the diode?
            The pulsed supply should be a fast slew rate or it will impact the turn off time of the switching transistor.

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            • #51
              I actually really like this circuit, I get a better response than with my current PMOS high-side configuration:


              Click image for larger version

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              I think that I'm going to stick with the PMOS set-up that I have now as my receive circuitry processes the signal with an expected -DC bias and so I'd have to do a complete revamp of that. Out of curiosity, would this configuration have any benefits over a traditional NMOS low-side switching configuration?

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              • #52
                Originally posted by CrizzyD View Post
                I actually really like this circuit, I get a better response than with my current PMOS high-side configuration:


                Click image for larger version

Name:	image.png
Views:	176
Size:	37.2 KB
ID:	414892




                I think that I'm going to stick with the PMOS set-up that I have now as my receive circuitry processes the signal with an expected -DC bias and so I'd have to do a complete revamp of that. Out of curiosity, would this configuration have any benefits over a traditional NMOS low-side switching configuration?
                One advantage might be that you dont need a negative supply but that might be a disadvantage if you need a negative rail for subsequent amplifiers. ( however its easy to get a negative supply with an additional diode and cap ).

                moodz.

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                • #53
                  Try IRFZ44, it is not high voltage MOSFET but didn't die during testing, it gives 2x higher amplitude on coil.

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                  • #54
                    Originally posted by pito View Post
                    Try IRFZ44, it is not high voltage MOSFET but didn't die during testing, it gives 2x higher amplitude on coil.
                    The benefit of higher amplitude is negated by avalanche occurring in the MOSFET. The IRFZ44 will have this problem.

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                    • #55


                      MOSFET is cold.

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                      • #56
                        I think this thread is about the best high voltage P mosfet for regular PI use where the IRF9640 is rated at -200 volts and will avalanche about -230 to -250 volts approx.

                        If the IRF9640 had the RDSON ( 13 milliohms ) of the IRFZ44 and could withstand -600 volts it would be great. However in a conentional PI circuit using a P type mosfet the Z44 would not be suitable because of its low avalanche figure.

                        Maybe your circuit is different ?


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                        • #57
                          Originally posted by moodz View Post
                          I think this thread is about the best high voltage P mosfet for regular PI use where the IRF9640 is rated at -200 volts and will avalanche about -230 to -250 volts approx.
                          This thread is about what is the best PMOS for the more traditional high-side PI TX. I've presented the IRF9640 and the IXTP10P50P as my own suggestions and you've presented an alternative configuration that could operate in the same layout as PMOS. But with NMOS. I don't understand these replies about just using NMOS.

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                          • #58
                            Originally posted by pito View Post


                            MOSFET is cold.
                            What is your peak and average current?

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                            • #59
                              Hi.
                              Personally i love more N-type mosfets and so when it comes to high side configuration i use gate Tx isolation teqhniques.

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                              • #60
                                Originally posted by CrizzyD View Post

                                I don't understand these replies about just using NMOS.
                                sorry for disturbing

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