SBG-PID

[Carl-NC]

Does it take an EF sample?

EFE sample delay (from the end of the main sample pulse) = 120us (so EFE delay is actually 27us + 33us + 120us = 180us)

The second channel isn't intended as an EFE stage, it behaves just like the ground channel in a TDI. The only way it can do EFE cancelation is if the GEB control is exactly centered, which then makes the GEB control otherwise useless.

This design may not need traditional EFE sample subtraction. Why? (This is a quiz question. Hint: the PI circuits in ITMD also did not have a late EFE sample, yet do OK without it.)

I view the timing numbers as stated to be a little suspect and if I were to build this I would try out alternatives. Which is a Good Reason for micro control, and maybe a simple display.

[Qiaozhi]

The second channel isn't intended as an EFE stage, it behaves just like the ground channel in a TDI. The only way it can do EFE cancelation is if the GEB control is exactly centered, which then makes the GEB control otherwise useless.

I initially thought that it must be working like a TDI, until I looked at the R and C values in the timing circuits.

This design may not need traditional EFE sample subtraction. Why? (This is a quiz question. Hint: the PI circuits in ITMD also did not have a late EFE sample, yet do OK without it.)

I'm not sure of the answer here, unless it's because the overall gain is too low.

I view the timing numbers as stated to be a little suspect and if I were to build this I would try out alternatives. Which is a Good Reason for micro control, and maybe a simple display.

Actually, I made a small error with the timing values. The sequence is as follows (if I've managed to get it right this time):

The TX oscillator (U1) output goes low for 22.6us (TX on), then goes high for 1.56ms (TX off). This gives a pulse rate of 632 pps.
At TX off - rising edge - U8a is triggered and generates a 27us pulse (main delay). On the falling edge of the 27us pulse, U8b is triggered and generates a 33us pulse. This provides the main sample. The falling edge of the 27us pulse also triggers U9b which generates a 120us pulse (secondary delay). The end of the 120us pulse - falling edge - triggers U9a which generates another 33us pulse. This is the secondary sample. This means that the full secondary delay (from TX off) is 27us + 120us = 147us. Not 180us, as I stated previously.

The fact that both samples have a width of 33us, plus the secondary delay of 120us, led me to believe that the purpose of the secondary sample was for EFE. I would have expected the secondary sample to be much closer to the main sample if it was intended for GEB.

The CD4538 timing is defined by the RC values (although they're not very accurate, according the the datasheet). The secondary sample delay uses R=120k and C=1nF. So 120k * 1n = 120us.

Unless the values in the schematic are incorrect, I still don't understand how this design manages to GEB.

[Carl-NC]

Actually, I made a small error with the timing values. The sequence is as follows (if I've managed to get it right this time):

The timing I was referring to was that in post #109.

The fact that both samples have a width of 33us, plus the secondary delay of 120us, led me to believe that the purpose of the secondary sample was for EFE. I would have expected the secondary sample to be much closer to the main sample if it was intended for GEB.

That's why I thought the timing numbers were a little suspect. I might be missing something, but you are right, for GB the samples are normally close.

[dbanner]

The timing diagram of SCS in post #109 are the same as what Qiaozhi has calculated. In TDI proto diagram, GB samples(high conductivity) are at 135us and 155us after end of tx pulse, 3200pps(pulse width 100us) and 10us first sample delay. all samples stated as 15us wide.

[ivconic]

I find it interesting and pleasingly simple, especially for a GB-PI. If you replace U1/U6/U8 with a small micro, it gets even simpler.

That's constantly on my mind, ever since i saw the schematic. Atmega, LCD = IN and 4538's and both 555's = OUT. Analog scale especially OUT!
It would be easy task. I already did similar thing on Barracuda circuit, using Joop's approach and added few of my own things above.
But before that; i would like to clear up all the obfuscations in schematic and establish proper one.
Next step; to make it as it is and see the behavior. Next step; adding "digital" and tossing out the analog parts...
But now i will wait George to clear up his doubts first.

[Qiaozhi]

The timing I was referring to was that in post #109.

I'm glad you pointed out the delay diagram in post #109, as I somehow managed to miss that.
As dbanner said, my calculations and the diagram match.

Firstly, with a main sample delay of 27us, there is not really any requirement for GEB. Hence I'm left wondering whether the GEB pot is mis-labelled, and it's function is simply to balance the main and EFE channels, similar to one of the HH options.

However, the discrimination (which most certainly must be based on conductivity) is somewhat intriguing.

Ivconic - If you have the time and inclination, please go ahead and make it as it is. That's probably the only way we'll understand how much of it works as advertised.

[scs]

Several milliseconds in more or less are of no great importance. It is important for the integrator. The scheme works well with a strobe over 22 milliseconds. I think option with controller is not better.

[scs]

Someone might think that's better ...

[ivconic]

...Ivconic - If you have the time and inclination, please go ahead and make it as it is. That's probably the only way we'll understand how much of it works as advertised.

Sure will do.
But i am struggling now with pcb. Already did draw 2 variants and both are total miss&mess.
Now am making third attempt...

[dbanner]

[dbanner]

PCB layout traced with Sprint layout creator.

[dbanner]

U3a, U3b(OP1a, OP1b) topology little strange for PI. Can someone describe integrator stage? Is this also bandpass or low pass filter? I see two feedback paths on each. Are they inverting integrator and bandpass filter? Also U4b(OP2) is unity gain inverting amp, overall effect is inverting integrator on one path and non inverting on the other path, correct? Discrim(meter) and GB pots for summing? The topology of the integrators are the distinguishing feature of this nimble circuit.
SCS can you give description and technical details of your integrators?

[scs]

Integrator and motion amplifier.

[scs]

It is not a bad idea to know that I am not a teacher in electronics for beginner

[dbanner]

It is not a bad idea to know that I am not a teacher in electronics for beginner