my mistake
Whoops - that's because I neglected to include the FMMTA14.sub file with that little package. Here it is. Copy this text into a text editor and save it as:
C:\Program Files\LTC\SwCADIII\lib\sub\FMMTA14.sub (making any appropriate changes to the path name). That should do it.
************************************************** *******************
*Zetex FMMTA14 Spice Model v1.0 Last Revised 12/6/2002
*
.SUBCKT FMMTA14 1 2 3
* C B E
Q1 1 2 4 SUB38C
Q2 1 4 3 SUB38C 12.75
*
.MODEL SUB38C NPN IS=1.1E-14 ISE=7.1E-15 NF=1.012 NE=1.4758
+BF=220 IKF=.12 BR=15 IKR=.05 RE=1.3 RC=.5 RB=.3 VAF=150
+CJE=14.5E-12 CJC=4.14E-12 VJC=.515 MJC=.26 TF=1.15E-9 TR=75E-9
.ENDS FMMTA14
*
*$
*
* (c) 2005 Zetex Semiconductors plc
*
* The copyright in these models and the designs embodied belong
* to Zetex Semiconductors plc (" Zetex "). They are supplied
* free of charge by Zetex for the purpose of research and design
* and may be used or copied intact (including this notice) for
* that purpose only. All other rights are reserved. The models
* are believed accurate but no condition or warranty as to their
* merchantability or fitness for purpose is given and no liability
* in respect of any use is accepted by Zetex PLC, its distributors
* or agents.
*
* Zetex Semiconductors plc, Zetex Technology Park, Chadderton,
* Oldham, United Kingdom, OL9 9LL
************************************************** **********************
About non-symmetrical pulses: When you use the diode equalization trick with CD4538 or HC221, if you do not allow the "tpw" capacitor to recharge between pulses you will get short and long pulses instead of having all the same.
FOR INSTANCE: In Carl's Hammerhead, I increase the 330Ω resistor (R46A, in the July 2006 schematic) to 360Ω, because otherwise - when the secondary delay pot is set for shortest delay N3 and N4 may not be equal (in my simulation).
Alternatively, you can use seperate RC timing components for each channel if you want the shortest delay between each channel, but then your individual channels will probably have worse matching between their sample pulses.
Please show me your specific circuit if you are still having a problem
Originally posted by Geo
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C:\Program Files\LTC\SwCADIII\lib\sub\FMMTA14.sub (making any appropriate changes to the path name). That should do it.
************************************************** *******************
*Zetex FMMTA14 Spice Model v1.0 Last Revised 12/6/2002
*
.SUBCKT FMMTA14 1 2 3
* C B E
Q1 1 2 4 SUB38C
Q2 1 4 3 SUB38C 12.75
*
.MODEL SUB38C NPN IS=1.1E-14 ISE=7.1E-15 NF=1.012 NE=1.4758
+BF=220 IKF=.12 BR=15 IKR=.05 RE=1.3 RC=.5 RB=.3 VAF=150
+CJE=14.5E-12 CJC=4.14E-12 VJC=.515 MJC=.26 TF=1.15E-9 TR=75E-9
.ENDS FMMTA14
*
*$
*
* (c) 2005 Zetex Semiconductors plc
*
* The copyright in these models and the designs embodied belong
* to Zetex Semiconductors plc (" Zetex "). They are supplied
* free of charge by Zetex for the purpose of research and design
* and may be used or copied intact (including this notice) for
* that purpose only. All other rights are reserved. The models
* are believed accurate but no condition or warranty as to their
* merchantability or fitness for purpose is given and no liability
* in respect of any use is accepted by Zetex PLC, its distributors
* or agents.
*
* Zetex Semiconductors plc, Zetex Technology Park, Chadderton,
* Oldham, United Kingdom, OL9 9LL
************************************************** **********************
Originally posted by Geo
View Post
FOR INSTANCE: In Carl's Hammerhead, I increase the 330Ω resistor (R46A, in the July 2006 schematic) to 360Ω, because otherwise - when the secondary delay pot is set for shortest delay N3 and N4 may not be equal (in my simulation).

Alternatively, you can use seperate RC timing components for each channel if you want the shortest delay between each channel, but then your individual channels will probably have worse matching between their sample pulses.
Please show me your specific circuit if you are still having a problem
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