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  • ADuC842 ?

    Carl

    Do you know if the ADuC842 / 841 is real?

    I have been getting good results on my tests with the ADuC812, but I am getting the feeling that it will be difficult for the 812 to match the results of the best analog receivers. It is close but not quite there. The main limitation seems to be speed. I think that with the 842 I would be able to use enough ADC samples to equal the analog PI results.

    In an internet search I only find the 842 on Analog's site or on other sites that are using Analog's press releases. I don't actually see the chip stocked anywhere. Also the technical documentation does not exist. There is only a preliminary pdf that does not document most of the new features.

    If this chip does really exist I think it is time to start thinking about designing it into a PI board.

    Robert

  • #2
    Re: ADuC842 ?

    Robert,

    Been meaning to get back with you on this. I emailed our app engineer about the ADuC's, the 841/2 are sampling, so I will get some sent to me, and forward a couple to you. I asked if they can directly replace the 812 on the eval board, but have not gotten that answer yet. I would surely think that they are pin-compatible.

    On my bench, I got the ADuC board hooked into the PI board, but the DAC output has a barely perceptible signal. So I am trying to get set up to write my own programs. My assembly language experience is limited to some inline code I used to do with C, so I am trying to set up a demo Keil C compiler to program with.

    - Carl

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    • #3
      Re: ADuC842 ?

      Carl,

      There is also SDCC which I have used with some success... (see link below)

      My AD agent in the UK (Abacus Polar) concurs with your stated timescale... I'm also after a couple, but my experience with AD samples through resellers is that it can take an AGE - it took months for me to get ADSP2191Ms - maybe these will be quicker... (generally, its far faster to use the USA AD web site for samples).

      Nicko



      SDCC home page on Sourceforge

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      • #4
        Re: ADuC842 ?

        Carl

        Some of the literature says that the quad flat pack is a drop in replacement for the 812. However, some of the new PWM function are on pins that are already in use on the evaluation board. So those features might not be usable on the board. I think one of the PWM's would be useful for VCO.

        I think the most important question I have is, can the new 2K of internal RAM be used as a destination for burst mode ADC. On the 812, burst mode cannot be used unless there is an external memory chip. I hope that one of the improvements is that the 842 can do burst mode in a single chip configuration.

        Robert

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        • #5
          C

          Carl

          The problem with C is that the ADuC812 on your evaluation board is not very fast, and you cannot afford to give away very much of its speed. Sixteen bits is not really enough to accumulate AD samples. You cannot take many samples before you risk overflowing 16 bits. In C your only choice beyond 16 is probably 32 bits. But 32 bit arithmetic is painfully slow in this chip. I am using 24 bits and even that is too slow.

          However, if you can replace the 812 with an 841 then C becomes much more practical.

          Robert

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          • #6
            Re: ADuC842 ?

            Hi Robert!

            I am carefully watching your interesting project. It is impressive! But I have some questions to you:

            1. Why don't you like AVR?
            2. Why are you interested in PI detector? But developing multifrequency detector is more future prospect.

            Konstantin.

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            • #7
              Re: ADuC842 ?

              Konstantin

              I do like the AVR. Of the single chip microcontrollers I have looked at, I like its CPU architecture the best. I use the AT90S8535 in my IB project. But it only has a slow 10 bit ADC and no DAC. The ADuC8xx chips have better analog sections. I wish I could get the analog parts of the ADuC combined with an AVR CPU core. I want to come up with a design that could be built at home, so I am trying to limit myself to single chip designs.

              I am working on PI because I want to learn about it. Also PI detectors are much easier to build at home than VLF detectors.

              Besides, PI is multi-frequency. The transmitted pulse contains many frequencies and the frequency distribution can be changed by changing the pulse width. The received signal contains a lot of frequencies and you can change the frequencies you look at by changing the sample delay.

              I want to experiment with PI target ID and changing pulse widths would be part of that.

              Maybe after I do PI I will do a multi-frequency VLF.

              Robert

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              • #8
                Re: ADuC842 ?

                Robert

                I have found in AVR datasheet , that ADC conversion time is 0,013 ms (76kHz). New megaAVR devices have differential input channels with optional gain of 10x and 200x.

                Second. I afford to disagree with you about ADC. Any CPU core and other I/O peripherials generate noises, therefore you can't use built-in ADC with maximum resolution (especially > 10 bit resolution). You will have to halt CPU core while ADC is doing a conversion.

                If you are using AVR you can built digital filters even with floating-point (if sampling rate < 100Hz). It is the most important.

                About DAC. There are many low cost (

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                • #9
                  Re: ADuC842 ?

                  Konstantin

                  I would be interested to know which AVR has a 0,013 msec conversion time. I do not think that is fast enough for the kind of PI I am doing, but it would help in my VLF. It would let me take 3 times as many samples as I do now, and it would simplify the software.

                  I am sure you are right about the CPU and I/O causing noise, but I did some tests to make sure that noise from those sources would not be too large. These tests were done on the 12 bit ADC in the ADuC812. With a DC input to the ADC I took 100 samples with the CPU running but no I/O, and only the LSB changes. Then I took 100 samples and turned an LED on during the conversion. If the LED turns on during the beginning of the conversion it has no effect. If it turns on while the LSB's are being converted the noise is 2 bits. So I will avoid I/O during the conversion. Other I/O might cause even more noise. This small noise should be compared to the external noise on the signal. Under the conditions I have been doing PI tests, the peak to peak noise at the input to the ADC is about 10 mV. This is about 4 bits of noise. So the CPU noise is much less than the external noise. After integrating and filtering, the 4 bits of noise becomes less than 0.5 bits.

                  I would be interested in hearing about your multi-frequency VLF project. There are also many people who read the forum but never post. I am sure that some of them would be interested in hearing details about your project. I know that writing about a project can be more work than doing the project, but I find that writing about it helps me understand what I am doing and it makes me be more careful in my testing.

                  Robert

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                  • #10
                    Re: ADuC842 ?

                    >Second. I afford to disagree with you about ADC. Any CPU core and other I/O peripherials generate noises, therefore you can't use built-in ADC with maximum resolution (especially > 10 bit resolution). You will have to halt CPU core while ADC is doing a conversion.

                    I agree, that on-chip digital content will generate noise. But companies that are good at mixed-signal chips, are good at managing that noise.

                    My current chip design has a dual 12-bit 52MHz ADC, with 36dB of AGC for a total of 100+ dB of dynamic range. We also have a large digital filter backend, probably larger than a 8051 core. So far, we are getting excellent results.

                    My prior project was a 14-bit 100MHz ADC. The challenge there is getting the 14 parallel bits out, driving up to 5pF loads, without corrupting the sample-and-hold. But we did it, and are getting 90+ dB of SFDR.

                    Actually, digital I/O noise is often harder to manage than the on-chip digital noise. LVDS is helping in the high-speed arena. But the best solution is to minimize digital I/O, and having on-chip DAC's is a big part of this solution.

                    Your m/f VLF project sounds interesting... is it something you're willing to share on the forum?

                    - Carl

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