Direct I/Q demodulation

[ivconic]

Sounds like you want to oversample, then digitally mix down to DC. I don't see that this has any advantage over quadrature sampling and binning the results directly to X and R, unless you intend to do the mix-down with a sinusoidal NCO to get bandpass filtering. Also, once you've digitized the signal, you've gotten all the resolution you're gonna get; digital gain doesn't mean anything. Again, oversampling can help because it can be used to improve SNR via digital filtering, which is what ST is doing with their ADC.If you want a learning experience, start with the 12b ADC, sample at 4x the TX freq, and do a simple X & R binning. Get everything working with this (TX phase reference, GB, target ID, etc), this kick on the 16b option, see what difference it makes. Then consider oversampling and doing digital demodulation. You'll probably want a better ADC for that.

Speaking of ADC and DSP... must admit that i am still pretty ignorant and without any practice.
That's why i am trying to learn something lately.
It was my huge disappointment once i realized that Atmega328P's ADC simply will not do.
That's why i will also obtain STM32.
But in meantime affordable and cheap ADC boards appeared on market and story becomes more interesting for us amateurs!
I would also like to check with this:
https://www.adafruit.com/product/1085

[sled]

@ivconic, not sure I don't know this particular board, it seems it has a DFU bootloader + a separate debugging port.

I know two options for "easy" programming:

a) stm32duino, gives you the ability to use standard arduino IDE with your board
-> check: http://grauonline.de/wordpress/?page_id=1004
-> check: http://www.davidpilling.net/wiki/index.php/STM32 (especially the links at the bottom)
-> check: http://www.stm32duino.com/ and http://wiki.stm32duino.com/index.php?title=Main_Page

b) mBed, an online IDE, https://developer.mbed.org/users/hud...103C8T6_Hello/

Other IDEs are CooCox IDE, GnuARMEclipse etc. but more complicated to setup.

What really matters when buying a dev board is not only the chip, good toolchain and information available is also important. Better spend 5$ more and save days of work.

I always use the official Nucleo boards from ST (cost about ~10$), come with an integrated debugger + programmer. Eclipse toolchain available, tons of tutorials and resources online.

Here's an overview of all Nucleo Boards: http://www.st.com/en/evaluation-tool...oductId=LN1847

Even if you don't use a nucleo board, check out STM32CubeMX (http://www.st.com/en/development-tools/stm32cubemx.html), it allows to configure your clock tree visually and setup the ports on your STM32 controller and generate some initialization code.

[sled]

@ivconic the ADC only has 860 samples per second, maybe enough if you do I&Q demodulation in the analog domain. But there are "slow" 24-bit ADCs for the same price. There are good ADC chips for low prices, but putting them on a SMD -> DIP adapter board and using through hole components for bypassing on a breadboard is not an optimal solution. Unfortunately I have not mastered any PCB layout software yet to create a good breakout board with all bypassing caps etc. on board.

We should do an evaluation of component datasheets here on Geotech to make a list of components suitable for MDs

My plan for this weekend is to build a simple DDS sine generator on the STM32 to get the TX signal.

[ivconic]

"...We should do an evaluation of component datasheets here on Geotech to make a list of components suitable for MDs ..."

Exactly!
...
Thanks for other links and hints!
Great help!

[scrungy_doolittle]

couldn't you split the "r" channel out, amplify it, then recombine it with the signal and digitize the output of that?
OR heavily amplify the total signal, digitize it, then digitally reduce the y channel?

[scrungy_doolittle]

Yes there is. it is called stm32. You can also use mbed.
http://www.emcu.it/STM32/What_should..._on_STM32.html
http://www.st.com/content/st_com/en/...eo-f411re.html this is the eval board that I got for
about 11 us.

the SW4STM32 toolchain may be obtained from the website www.openstm32.org

I got this up and running, along with the STM cube software chain. The nucleo board has a built in jtag debugger, that can be snapped off. You can and should get one of the
jlink clones off ebay. You will have to get a special cable though. On the STM32F103, PA13,14,and 15 are the debug interface.jtms/swdio. You can connect the jlink debugger to them.
Here is an example: http://www.ebay.com/itm/JLINK-V8-deb...4AAOSwvg9XecOr

[sled]

@scruungy_doolittle: you can upgrade the st-link to a segger j-link for free, check out https://www.segger.com/jlink-st-link.html

[sled]

couldn't you split the "r" channel out, amplify it, then recombine it with the signal and digitize the output of that?
OR heavily amplify the total signal, digitize it, then digitally reduce the y channel?

hmm I also thought about this but how to split the R channel in the analog domain without IQ demodulation? another option would be to use a programmable gain amplifier (PGA) and interleave the samples, i.e take two samples 90 degrees apart at normal gain and then two samples 90 degrees apart at a higher gain.

[Carl-NC]

You want to run the signal into the ADC at the highest possible gain without overloading the ADC. The strongest signal is usually the reactive due to ground, but also you want to account for some additional range for a strong target signal. Suppose the ADC has a 5V range so you set it up so that a silver dollar (mostly X) hits the peak of the ADC at ~2 inches. If you take the same signal and gain it by 5X more, you will likely overload the R channel way sooner on a high-resistive target. Maybe there are ways to work around this using an RSSI circuit, honestly I haven't given it a whole lot of thought.

[ivconic]

@ivconic ... maybe enough if you do I&Q demodulation in the analog domain...

That's also Davor's idea too.
This seems as most logical choice to me.
Than we can have wider choice of ADC chips to try.

[moodz]

Speaking of ADC and DSP... must admit that i am still pretty ignorant and without any practice.
That's why i am trying to learn something lately.
It was my huge disappointment once i realized that Atmega328P's ADC simply will not do.
That's why i will also obtain STM32.
But in meantime affordable and cheap ADC boards appeared on market and story becomes more interesting for us amateurs!
I would also like to check with this:
https://www.adafruit.com/product/1085

At 860 samples per second for that ADC .. you are going to be very limited for direct demodulation.

[scrungy_doolittle]

That's also Davor's idea too.
This seems as most logical choice to me.
Than we can have wider choice of ADC chips to try.

My pick is the PIC24FJ128GC010 it has a 10 mega sample 12 bit ADC with DMA, as well as a 16 bit sigma delta ADC http://ww1.microchip.com/downloads/e.../30009312d.pdf 3 comparators, 2 opamps. Is pin compatible with the dsPIC (you can actually replace the pic 32 in the chipkit board with this part.)
You can use it in interleaved mode with DMA.
Set one channel of the 12 bit to sample the transmit that is generated with the DAC in the same chip, sample the receive with BOTH the 16 bit and th 12 bit (interleave the 12 bit, so that every other sample is transmit and recieve) [ then you have direct phase shift info i.e. the sampled receive,and the sampled transmit] Use the two op amps, plus to others to create the analog demodulator (and you can toggle the sample bits as yo are generating the DDS sine wave). Devote two more ADC channels to the demodulated X and Y signals. This way, you can do digital demodulation, and also analog so that the analog can have the R channel amplified.
I'd use the 16 bit delta sigma, if I needed really detailed resolution. If you are smart, you can do all this, with the the samples aligned in buffers such that one sample = 1 degree.
For example, if you have the delta sigma set to a sample rate that is a multiple of 360, then every sample becomes 1 degree and an index number 0-360 into the sample array, gives you the value for
that specific degree. If you synchronize this to the transmit sample, then you have a really in-depth platform. you are generating the sample signals for the demodulator, as you generate the coil signal,
the delta sigma has a 62K sample highest through put. The sample rate is dependent on the oversampling value that you select.

At 10 mega samples per second, using 4 channels, that gives you each channel sample rate of 2.5 mega samples per second. Doing a 10x over sample i.e. taking every 10 samples, and averaging them to get a sample point, gives you 240,000 samples per second, which is more than enough.

[scrungy_doolittle]

6000 di pro modification for computer control

This schematic shows modifications to the main guts of the 6000 di pro. Not sure where it came from, but almost 100% certain that it came from geotech originally. By deleting the area in the boxes, adding a micro to generate the frequency and the sampling period, tapping the received signal
with an ADC channel, and grabbing x,y,g,xf,yf,gf and putting them into ADC channels, you can do direct IQ sampling, as well as X,Y and G values, including amplifying the "r" channel.
From here, the ui and discrimination functions can be done in software.

It would be great to have this portion laid out on a PC card, with the signals avaialable on a header that could be plugged into an arduino compatible. That is, make a shield with the circuitry here, tap the analog lines, and two digital output lines. A properly laid out shield would allow this to be used with a huge number of CPU's that have boards with arduino compatible footprints, including the STMF411re nucleo board, as well as a number of
atmel and microchip boards. Ti even has a arduino footprint compatible MSP430 board.

If someone does this, it would be great to do it in KiCad, because that is very available, and a really advanced layout tool. I see .lay files all the time that I can't look at.

I'd also make R24 into a pot, like the 4900 sensitivity. That would allow a manual adjustment of the current going into the coil (because of the zener next to it that clamps the voltage). The other change I would make
is to put the sigbal circuitry in between the receive signal and the demodulator.

I wish I could get the electronic master to this so it could be edited....

[sled]

My pick is the PIC24FJ128GC010 it has a 10 mega sample 12 bit ADC with DMA, as well as a 16 bit sigma delta ADC http://ww1.microchip.com/downloads/e.../30009312d.pdf 3 comparators, 2 opamps. Is pin compatible with the dsPIC (you can actually replace the pic 32 in the chipkit board with this part.)
You can use it in interleaved mode with DMA.
Set one channel of the 12 bit to sample the transmit that is generated with the DAC in the same chip, sample the receive with BOTH the 16 bit and th 12 bit (interleave the 12 bit, so that every other sample is transmit and recieve) [ then you have direct phase shift info i.e. the sampled receive,and the sampled transmit] Use the two op amps, plus to others to create the analog demodulator (and you can toggle the sample bits as yo are generating the DDS sine wave). Devote two more ADC channels to the demodulated X and Y signals. This way, you can do digital demodulation, and also analog so that the analog can have the R channel amplified.
I'd use the 16 bit delta sigma, if I needed really detailed resolution. If you are smart, you can do all this, with the the samples aligned in buffers such that one sample = 1 degree.
For example, if you have the delta sigma set to a sample rate that is a multiple of 360, then every sample becomes 1 degree and an index number 0-360 into the sample array, gives you the value for
that specific degree. If you synchronize this to the transmit sample, then you have a really in-depth platform. you are generating the sample signals for the demodulator, as you generate the coil signal,
the delta sigma has a 62K sample highest through put. The sample rate is dependent on the oversampling value that you select.

At 10 mega samples per second, using 4 channels, that gives you each channel sample rate of 2.5 mega samples per second. Doing a 10x over sample i.e. taking every 10 samples, and averaging them to get a sample point, gives you 240,000 samples per second, which is more than enough.

The 16-bit ADC is nice! However I don't have experience with PICs unfortunately. The integrated on-chip opamps are often not suited for the job.

Sampling at every degree means a very high sampling rate and a lot of data to process. E.g commerical detectors have a frequency range up to 15kHz. Getting 360 samples on a full cycle, means 360*15Khz = 5.4MS/s. This fills up your RAM really quick, and not much cycles per sample left.

[scrungy_doolittle]

The 16-bit ADC is nice! However I don't have experience with PICs unfortunately. The integrated on-chip opamps are often not suited for the job.

Sampling at every degree means a very high sampling rate and a lot of data to process. E.g commerical detectors have a frequency range up to 15kHz. Getting 360 samples on a full cycle, means 360*15Khz = 5.4MS/s. This fills up your RAM really quick, and not much cycles per sample left.

No you are wrong there. 60 hz is 16.666 ms i.e. (1/60 ) * 1000=16.666 at 15000 hz you have (1/15000)*1000 = .066 milliseconds. that is a full cycle. divide that by 360 and you get 1.185 10-4 milliseconds per degree. .00018 milliseconds. That is .18 usec per degree. so sampling 1 cycle at .18 usec, 16 bit resolution, it would take all of 2*360 = 720 bytes. It takes more memory to do slower
frequencies. You fundamentally mis-understand frequency. You are giving the amount of memory to digitize 15,000 cycles. We only need to digitzed a maximum of 10 to get 10x over sampling.