Announcement
Collapse
No announcement yet.
Pim Puls .XR 7
Collapse
X
-
Things move fast on this forum. I bet Orbit did not reckon that the response to his initial post would be on its 3rd page within a week.
It would be interesting to hear comments about what the seemingly complicated stages in the receive path do, and what the advantages (if any) are there over more conventional analogue circuitry.
Eric.
Comment
-
Originally posted by Ferric Toes View PostThings move fast on this forum. I bet Orbit did not reckon that the response to his initial post would be on its 3rd page within a week.
It would be interesting to hear comments about what the seemingly complicated stages in the receive path do, and what the advantages (if any) are there over more conventional analogue circuitry.
Eric.
The guys are drawing fastam also delighted .
Comment
-
Originally posted by Ferric Toes View Post
It would be interesting to hear comments about what the seemingly complicated stages in the receive path do, and what the advantages (if any) are there over more conventional analogue circuitry.
Eric.
TR4 and TR9 are interesting. Some type of blanking or SAT?
Nice to recover this kind of information before it's lost forever.
Comment
-
Originally posted by Altra View PostIC3 LM741 looks like a virtual ground to form "-VT".
Also do not see a damping resistor? Maybe off board or built into the coil?
Comment
-
Originally posted by KingJL View PostCorrect (creates -VT on Eric's schematic).
Seems that R5 (Eric's schematic) is doing some damping above the diode thresholds.
Comment
-
Originally posted by green View PostI use the input resistor, R5(Eric's schematic) for the damping resistor for my mono coil amplifier. Wondering if the circuit needs another damping resistor.
Eric.
Comment
-
Originally posted by Ferric Toes View PostI wonder what happens when the flyback voltage drops below 0.6V. Is there an overshoot or ringing? It is something that is easily tried or simulated. Perhaps it did not matter as the first sample delay was relatively long in these detectors.
Eric.Attached Files
Comment
-
LtSpice model of Superdec Front end
This is a LtSpice model of the superdec front end. The collector circuit of Q7 (TR4 of Eric's superdec schematic) is tied back to the negative rail as the timing logic is not modeled. It appears that the FE gain is about 122.
Schematic:
Frequency response:
LtSpice Files:
superdec_FE.zip
Comment
Comment