PLL driven power oscillator with f-to-V conversion

[Davor]

BTW, a bang-bang detector does produce pulses of either polarity. Or none at all.

[Teleno]

I have a completely different 4046 model, based on a hierarchical model. Funny but it also had some problems, and I fixed them. Let me check where I put it...
Here, this is the last-known-good model that worked properly, and even gave results comparable to reality. Put 4046.asc and 4046.asy into a folder your schematic is, and simply use the symbol. You may as well make your own symbol, but this one work as well. If you ever wish to obscure what's inside it, use a netlist of 4046.asc and rename it to .sub.
This model does not have the "tri-state-amplifier" for analogue input, but I modelled the Vdd related resistance... kinda works OK.

I see there's a lot of work into that model.

Today I wired up an old CD4046B on a breadboard, these are my findings:

- The current in the capacitor is: 6 x I(R1) + 4 x I(R2). Some datasheets claim it's I(R1)+I(R2), but it isn't true.
- The capacitor is charged from approx. -1V (-0.8 to -1.1 depending on Vdd) up to approx. Vdd/2 (+10%). This charging time is 1/2 period of the square waveform.
- According to the schematic, pin 12 (R2) is the naked current mirror input. However, the variation in the threshold voltage of the input p-mos is too wide (from -1.69 to -2.54 for different currents and Vdd), revealing the presence of some source degeneration resistor.

These are my data:

Vdd(V)	I(uA)	Vth(V)
5	33.1	-1.69
5	112	-1.97
10	81.6	-1.84
10	285	-2.29
15	130	-1.96
15	461	-2.54

Regarding the improved version 74HC4046, this document has the most comprehensive design formulas an a BASIC program in the appendix to calculate the components:

http://www.etc.tuiasi.ro/cin/Downloads/pll/PLL-4046.pdf