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  • sample white noise

    Playing with spice, wondering if I can compare integrator noise out with different sample times. Can change integrator sample times and R4 resistance so integrator gain is the same. Was wondering how much cutoff frequency effected analysis. Added a 100pf capacitor after R6 for a .2us TC(800kHz response). Slowed the analysis a lot. Was wondering what(2e6*time)means. Appears it lowers frequency of noise but integrated p-p noise is higher with(.5e6*time). Need to try different sample times and maybe add the 100p capacitor to filter he noise. Wondering if there is something I should change before spending more time. Anyone know what(2e6*time)means?
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  • #2
    I'm not familiar with LTSpice, but Easy-Spice has a similar noise source. It allows a parameter that sets the "white noise bandwidth"; that is, the BW over which the source is guaranteed to have a flat frequency response. Theoretically white noise goes to infinity but in a simulator you need an upper limit so the time step remains reasonable. Your parameter may be different in that it is multiplied by "time" which should be the instantaneous time of the simulation.

    The short of it is, I don't know, but no one else answered so maybe this will help.

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    • #4
      The .noise analysis is a small-signal ac analysis. What green is trying to use is a time-domain noise source, completely different. However, one of your links had a potentially valuable nugget:

      All the functions are detailed in the help under circuit elements -> arbitrary behavioral voltage or current sources.

      green, that's where to look.

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      • #5
        I was curious enough to poke around some more and found this:

        https://www.allaboutcircuits.com/technical-articles/how-to-perform-transient-analysis-noise-simulation-LTspice

        It appears that it is, indeed, a frequency limitation parameter. I'm not sure why it is multiplied by 'time'.

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        • #6
          Thanks for the replies.

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          • #7
            Originally posted by green View Post
            Playing with spice, wondering if I can compare integrator noise out with different sample times. Can change integrator sample times and R4 resistance so integrator gain is the same. Was wondering how much cutoff frequency effected analysis. Added a 100pf capacitor after R6 for a .2us TC(800kHz response). Slowed the analysis a lot. Was wondering what(2e6*time)means. Appears it lowers frequency of noise but integrated p-p noise is higher with(.5e6*time). Need to try different sample times and maybe add the 100p capacitor to filter he noise. Wondering if there is something I should change before spending more time. Anyone know what(2e6*time)means?
            After looking at Carl's reply #5 I'm thinking(2e6*time)is 2MHz cutoff. Tried sampling at 1, 2, 4, 8 and 16us to compare noise level. (1e6*time)1MHz cutoff? R4 changed to keep integrator gain constant. Was wondering if sampling with an A-D(1us sample)would have more noise than sampling with an integrator with longer sample times. The spice analysis suggests it does. Depending on the target TC the increase in signal might be greater than the increase in noise. Wondering if there is a best sample time.
            Attached Files

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