Single capacitor integrator switch placement

[dbanner]

One other thing I noticed is that it provides a constant input impedence, when the lines feeding fet1 and fet2 are pulled to ground on alternate off periods. I think this might improve the accuracy and transfer characteristics of the circuit.

[6666]

I had remembered the fridge magnet giving a signal. Tried this morning with target response tester, scoped amplifier out no integrator. 8inch figure8 coil. Couldn't see change with fridge magnet. Ceramic hobby magnet easy to see signal as I pulled magnet away from coil. Neodymium magnets gave a similar response but they are a short TC targets static. Must have done something wrong when I tried adjusting EF with the fridge magnet before.

Thanks for that

[dbanner]

MPP integrator does not have a discharge Tau for C? If the feedback R is disconnected from the circuit during the off period, then what governs the discharge tc? So sample width and period do not affect the gain?
Coupling the input to the output via feedback resistor during the off cycle affects the output impedence of the integrator?

[dbanner]

Thinking some more on the MPP differential integrator, if V(in) decays during the sample period, the charge Tau of Rin/C decreases as a ratio of the previous sample charge Tau (net charge /discharge). This is going to affect the gain in relation to the sample width, no? Especially if the Vin decay is non linear, makes computing the gain a horrible excercise.
If this is so then there might be implications for GB with this integrator topology especially if the lines are pulled to ground.????

[Carl-NC]

I've not had time to do a full analysis of the MPP integrator. It's a difficult task. But I can answer some of the questions.

Yes, the feedback R couples the input to the output during hold mode. But the output is low impedance, maybe a few ohms at the most. So at the output you see the input attenuated by maybe 60-70dB.

The discharge tau is still set by the feedback resistor, but now its effect is modulated by the duty cycle. In a normal (1C) integrator you might have a 100k resistor; now you have a 6.8k but it's only connected across the cap a small percentage of the time. The overall effect is the same.

Adding grounding switches solves the input-to-output coupling, and also presents a constant input impedance to the preamp. But I think you won't see any practical difference.

[dbanner]

Thanks Carl.

When I see transient analyses being done in the nanoseconds range, I begin to cringe, as was the case with the MT-090 document.

[Ferric Toes]

Just trying to learn something. Why would I want a variable TC?

I used this type of integrator in the Superscan where the integrator TC was adjustable via a pot on the control box. This was useful because the Superscan used a variety of coil sizes both mono and separate TX and RX, so the emi noise problem varied a lot and this extra adjustment proved useful. In industrial environments too, there was often a need to have this additional flexibility.

Eric.

[Cazavor]

If I replaced the feedback resistor on a 1C integrator with a potentiometer, would that also work as well for having a variable TC?

[Carl-NC]

If I replaced the feedback resistor on a 1C integrator with a potentiometer, would that also work as well for having a variable TC?

It would work, but that RC is very sensitive to noise injection. Running wires to a user control (pot) would be highly susceptible to noise pick-up.

[6666]

Got a packet of eight 20mm ceramic magnet's, quite strong for the size.

These ceramic magnet's can do some Violent things to a waveform
but held still and they dont show any signal, so I guess must be the right material.

[Ferric Toes]

This works better than any other integrator I have tried, and simple too for analysis. Suitable jfets are J110, J112 and J113 plus the matched pair NPD5566. Input and feedback resistors can be different to the values shown to suit pulse rate, sample pulse width and response speed required. 1% metal film are recommended. Good quality polyester capacitor, again of a value to suit the application and the IC I use is 1/2 a TLC2262 with the second half as following d.c. amplifier. Being a Cmos device there is no measurable droop during the hold period, and with the balance preset a very precise notch can be set for EF rejection. This is set, not by waving a magnet, but by injecting a low frequency sine wave (2 - 5 Hz) into the first preamp stage to give an excursion of between 300 and 500mV on either of the preamp outputs (normal or inverted). The output of the integrator can then be viewed on a scope to see the ramp up, the hold period, and then the ramp down to the base level. The preset is adjusted until there is almost no movement in the base level. the setting is quite critical with the 100ohm preset, hence the parallel 47ohm resistor which widens out the adjustment point somewhat. The J110 and J112 have lower 'on' resistances than the J113 and maybe with other types of gate (Cmos) , particularly if matched, the preset can be eliminated.



Eric

[green]

This works better than any other integrator I have tried, and simple too for analysis. Suitable jfets are J110, J112 and J113 plus the matched pair NPD5566. Input and feedback resistors can be different to the values shown to suit pulse rate, sample pulse width and response speed required. 1% metal film are recommended. Good quality polyester capacitor, again of a value to suit the application and the IC I use is 1/2 a TLC2262 with the second half as following d.c. amplifier. Being a Cmos device there is no measurable droop during the hold period, and with the balance preset a very precise notch can be set for EF rejection. This is set, not by waving a magnet, but by injecting a low frequency sine wave (2 - 5 Hz) into the first preamp stage to give an excursion of between 300 and 500mV on either of the preamp outputs (normal or inverted). The output of the integrator can then be viewed on a scope to see the ramp up, the hold period, and then the ramp down to the base level. The preset is adjusted until there is almost no movement in the base level. the setting is quite critical with the 100ohm preset, hence the parallel 47ohm resistor which widens out the adjustment point somewhat. The J110 and J112 have lower 'on' resistances than the J113 and maybe with other types of gate (Cmos) , particularly if matched, the preset can be eliminated.

[ATTACH]50574[/ATTACH]

Eric

What is the gain formula? What is the time constant formula? Tried in spice and not sure I did it correct.

[green]

What is the gain formula? What is the time constant formula? Tried in spice and not sure I did it correct.

Played with spice some more. The formulas work for the simulation values, not sure correct for any values. Should have ( ) around 2*R1 for gain left simulation.

[6666]

This works better than any other integrator I have tried, and simple too for analysis

Thanks Eric.

[Carl-NC]

This works better than any other integrator I have tried

That's very similar to a bipolar design I did a while back. Based on your original zero-droop demod, I added the negative sampler and extra feedback R. I did not use a trimmer and used 4066-type switches instead of JFETs. I agree, it works very nicely.