Single capacitor integrator switch placement

[Cazavor]

Hi I am currently in the progress of putting together a PI detector schematic based on all the info I have learned from this forum and I have a question about the 1C integrator and 4066 switches.

I see most schematics using the (1) version on the image I attached. Switches before the input resistors. I was going to do so as well but then I saw the following note on Analog Devices MT-088 tutorial which got me thinking: "To minimize the effect of RON change due to the change in input voltage, it is advisable to put the multiplexing switches at the op amp summing junction" [1]. That would be equivalent to the circuit (2) with switches after the input resistors.

I understand that then the during sample time the op amp would keep the voltage on both sides of the switch close to zero and thus the on resistance of the switch would not change as the input voltage changes. Is this worth considering? Any downsides doing this, perhaps switch charge injection affecting the integrator more?

[1] https://www.analog.com/media/en/trai...als/MT-088.pdf

[Altra]

Hello, not sure which circuit is better performance wise? But figure 1 would be the best choice for a standard pi, since you can replace R3 & R4 with a trim pot to balance the earth field and any mismatch between inverting and non inverting inputs.

[waltr]

Why not put resistors both before and after the switch on the PCB.
Then you can experiment with each configuration.
Put in zero Ohm or a wire jumper to 'remove' the resistance.

Have extra locations for parts when doing a PCB is a good idea when first designing a circuit.
You then have the options of doing the circuit in different ways.

[green]

Tried both ways. Switch after input resistors better for me, not sure why.

[Carl-NC]

I always use method 2 these days, precisely for the reason in the ADI app note.

[Cazavor]

Looks like method 2 is worth trying then. I'll post to this thread if I find any practical differences.

Tried both ways. Switch after input resistors better for me, not sure why.

That circuit looks good as it still allows balancing while negating the switch resistance variance. How did you see it worked better?

[green]

Looks like method 2 is worth trying then. I'll post to this thread if I find any practical differences.


That circuit looks good as it still allows balancing while negating the switch resistance variance. How did you see it worked better?

Have forgotten why I think it looked better. Posted in another thread awhile back but couldn't find where I posted it.

The 100R pot worked for balancing EF signal. Trimming inverter gain should do the same?

[Cazavor]

Have forgotten why I think it looked better. Posted in another thread awhile back but couldn't find where I posted it.

The 100R pot worked for balancing EF signal. Trimming inverter gain should do the same?

I think it should unless there is more than 1 integrator (channel) that need to be adjusted separately.

[green]

I always use method 2 these days, precisely for the reason in the ADI app note.

Do you use integrators with new designs or sample with an A-D and digital filter?

[Carl-NC]

Do you use integrators with new designs or sample with an A-D and digital filter?

Mostly integrators, although I do have one direct sampling project in the pipe.

[Altra]

I have been wondering how to calculate or select the R and C values for 1C and 2C integrators? For instance we have a 1C integrator as posted above and we want to make an equivalent responding 2C. Assuming equal pulse rate and sample times. Thanks

[green]

I have been wondering how to calculate or select the R and C values for 1C and 2C integrators? For instance we have a 1C integrator as posted above and we want to make an equivalent responding 2C. Assuming equal pulse rate and sample times. Thanks


[ATTACH]50452[/ATTACH]

(R1, R2=1k) (R3, R4=100k) (C1, C2=470n)

[bklein]

Back in the 70's I worked for a company called Music Man as an engineering technician. I was trying to design a A/B switching circuit to switch in and out external effects in a guitar amp. I came across a circuit I think using the CD4007 that was very much like figure #25. I tried it and it worked great (much better than a relay we were using), but lost my job soon after and lost the circuit reference. I think it was one of those EDN design notes, possibly in one of their collection books. Is there a site that may have all these old design notes books online? Its always been annoying me that I lost that circuit. I know its been 40 years or so and better circuits have been developed, I just would like to find that design note.... :-) If I remember right, it worked better than circuits using the CD4066 or CD4016, and now I wonder why.

[Altra]

(R1, R2=1k) (R3, R4=100k) (C1, C2=470n)

Thanks Green

I was thinking in the 1C, the integrator capacitor is seeing 2X the samples as each capacitor in a differential circuit. Therefore a difference in integration time constants?

[green]

Have forgotten why I think it looked better. Posted in another thread awhile back but couldn't find where I posted it.

The 100R pot worked for balancing EF signal. Trimming inverter gain should do the same?

Been trying to find reply where I explained why it was better. Have a hard time using search. Searched threads I started and didn't find it. Think maybe it is another thread. How do I search threads for the word integrator with my reply only? Or how should I go about finding it?