Analog Demodulator Stability Problem

[Daves]

Hello,
When I look at the signal at the analog demodulator output, I see approximately 40mv fluctuation.
Do you have anything to suggest on this matter?

[Carl-NC]

Is it due to the demod clocking or due to EMI? Remove the RX coil and see if it goes away.

[Daves]

Is it due to the demod clocking or due to EMI? Remove the RX coil and see if it goes away.

When I removed the coil;
There is very small oscillation, around 1-2mvpp maximum. It looks more stable and doesn't move up and down too much.

When I install the coil;
One channel has a very unchanging oscillation of 3-4mvpp.
The other channel oscillates randomly up and down 15-20mvpp.

[Carl-NC]

Sounds like mostly EMI. The remaining small oscillation (without the coil) could be due to normal demod clocking, increasing the integrator cap will reduce this.

[Daves]

Sounds like mostly EMI. The remaining small oscillation (without the coil) could be due to normal demod clocking, increasing the integrator cap will reduce this.

Thanks Carl, i will try and let you know.

There is another question I want to ask. During TX drives, I and Q signals are received from TX and these signals are given to Analog Demo to create I and Q.

What I don't understand here is, why don't they give this from the processor?

[ivconic]

Thanks Carl, i will try and let you know.

There is another question I want to ask. During TX drives, I and Q signals are received from TX and these signals are given to Analog Demo to create I and Q.

What I don't understand here is, why don't they give this from the processor?

If processor is capable (read as if ADC is good enough); they usually do.
That's what we call "direct sampling".
But in most of the existing designs processor's resources are saved by "external extraction" of I and Q.
Plenty ways to skin a cat. Pick one that suits you.
...
I noticed a strange phenomenon.
However powerful the processor is in other resources; almost as a rule does not have a good enough ADC.
So in more serious designs, an external "dedicated" ADC circuit is generally used.

[Daves]

If processor is capable (read as if ADC is good enough); they usually do.
That's what we call "direct sampling".
But in most of the existing designs processor's resources are saved by "external extraction" of I and Q.
Plenty ways to skin a cat. Pick one that suits you.

I'm not talking about direct sampling.
If we are already generating the TX signal from the processor, why are we building analog circuitry to get the TX references? Please examine the location in the picture.

[ivconic]

I'm not talking about direct sampling.
If we are already generating the TX signal from the processor, why are we building analog circuitry to get the TX references? Please examine the location in the picture.

That's only one of the ways to do the job.
It is just one of the cases, not the rule.
Search XP Deus topics on the forum for example.
It has only frontend opamp, adc and mcu, everything is done in the code.
Also I am sure I have seen several russian projects with similar solutions, published here on forum too.
You are asking right questions but already answered so many times so far on the forum.
Also is very interesting to read whole AMX project discussion.
I think the most relevant facts you can read there, no matter it is basically a PI design.
Starting multiple topics with only about one question is probaly the good idea if put in separate forum to keep the things together.
Carl is finishing the book, I think he covered all the similar questions there.
Like I said, its from case to case, from method to method, plenty ways to do things to reach the final goal.
But usually the main reason for additional analog circuitry is the processor capabilities and resources.

[Carl-NC]

The R-clock is usually adjusted to achieve GB on some standard like ferrite. This is easy to do with analog clocking using trimpots. There is no reason you cannot generate the demod clocks in the micro, but then you need a way to adjust them. In the White's V3 this was done by a smart calibration routine.

[Daves]

The R-clock is usually adjusted to achieve GB on some standard like ferrite. This is easy to do with analog clocking using trimpots. There is no reason you cannot generate the demod clocks in the micro, but then you need a way to adjust them. In the White's V3 this was done by a smart calibration routine.

Carl, "routine" can you explain this a bit?

[Carl-NC]

You first take X&R channel data with no target present, this gives you a baseline vector that accounts for the coil null and circuit offsets. Then you take X&R channel data with ferrite present, this gives you a baseline+ferrite vector. You can use this info to rotate all other incoming data to normalize it to ferrite. Or, use the ferrite data to create a software G channel.

[Daves]

You first take X&R channel data with no target present, this gives you a baseline vector that accounts for the coil null and circuit offsets. Then you take X&R channel data with ferrite present, this gives you a baseline+ferrite vector. You can use this info to rotate all other incoming data to normalize it to ferrite. Or, use the ferrite data to create a software G channel.

when i do it this way, what can i see as id and angle when i approach the coil with ferrite? for example, with whites xlt, it indicates approximately +95 as hot rock or it becomes overloaded. and is it stable enough to give only one id? will ferrrite zeroing also be valid for sandy soil structure on the beach? what precautions should be taken because salt is exactly in the middle on shared vdi scales?

and why do we see the default 90 in every device in the Ground setting? What is 90? I don't think this is 90 degrees. Does this basically change the rotation for the ferrite? The value is not already at 90, why 90?

Thanks for your reply

[Carl-NC]

I don't know why a lot of detectors indicate ferrite to be close to "90," it is really close to 0°. Salt is close to 90°. VDI numbers that detectors spit out are basically "made up."

[Daves]

I don't know why a lot of detectors indicate ferrite to be close to "90," it is really close to 0°. Salt is close to 90°. VDI numbers that detectors spit out are basically "made up."

Carl, what is the diffrences All Metal and Discrim channel for direct sampling, digital new metal detectors?
1)is All Metal mode using only I or Q
2)is Discrim using using I+Q?

What are the technical differences?

[Altra]

All metal GB channel = R = (I)n phase 0 deg and Disc channel = X= (Q)uadrature 90 deg. The phase is calculated using atan(R/X). See these threads for more information


https://www.geotech1.com/forums/foru...ithm-challenge

https://www.geotech1.com/forums/foru...nt-function