PCB's and Noise

[Altra]

I was wondering if 4 layer pcb's are mandatory in modern detector circuits using micros. If so what is the proper stack up of layers?

I have stuck with two layer pcbs and have not ventured into 4 layer. The main noise I encounter is a telegraph or gargling noise you can hear when the threshold is just audible. This is non correlated with tx frequency and can occur with rx input grounded. Also assume bypass caps, ground planes and separation of digital/ analog sections have been followed.

Thanks

[pito]

The noise is coming from audio amplifier, to confirm it use headphone with minimum loudness instead of speaker.

[Altra]

This noise can be seen with oscilloscope no speaker connected at various stages. It's not one specific pcb or design. I want to know in general how the manufactures are doing their pcb with these complex designs.

This is an excellent video.

https://www.youtube.com/watch?v=ZYUYOXmo9UU

[pito]

threshold is just audible = ???

[ivconic]

I was wondering if 4 layer pcb's are mandatory in modern detector circuits using micros. If so what is the proper stack up of layers?...

Professionals will definitely give a relevant answer. But until they "wake up", let me give my opinion.
No, I don't think a 4-layer pcb design is necessarily required.
4-layer or n-layer pcb design is just a convenience that some have and according to the principle "we do it because we can" they work at that level.
Even 1 layer is enough for the device to work well and have good immunity to interference and noise.
When using microprocessors and microcircuits though... I can't even imagine how it would be done on one layer, but two layers is already ok.
However, truth be told, while drawing some pcbs with processors that have many more pins than 32, 44... I noticed that 2 layers is not enough.
That is, they are not mandatory, but it would be much easier to draw the pcb if there are more layers.
So... it's not just interference and noise, sometimes the problem of many pins on a chip with very small spacing is decisive for the choice of the number of layers.
The world existed long before the n-layer pcb. Devices also worked on UHF bands and without pcb, in ancient times, components were connected in "air"...
The real thing is the proper design of the links, vias and connections itself.
A double layer pcb is quite sufficient if it is designed to have the best possible S/N ratio.
There are "schools" and "courses" for pcb drawing. There is a set of ground rules etc.
But there is no generally universal solution and answer. It all depends on case by case, design by design.
The video is awesome, thanks for the link.
But note that the lecturer first addresses designs that are much more complex than metal detectors and have circuits that operate at much higher frequencies.
Unless you plan to design a detector with a dozen different microcircuits that work at different and high frequencies... that you have several inverter power supplies on the same pcb...
there is no need to think about a pcb with more than 2 layers.
Or if you are in a situation where you can say "I work like this because I feel like it and because I can"... then go ahead!
Ground plane as an intermediate layer will not solve problems by itself. It will only insulate the outer layers.
Much more attention should be paid to connections, thickness of connections, where they go, what they go past, how long they are, etc.
Each pcb is a story in itself. Case by case... by case...
...
Next thing.
Advanced software packages have a set of settings and the draftsman doesn't even think about these things. The software package does everything by itself.
You have a template of the type "UHF device", "PC mainboard template", "Multiple switcher template"... I'm paraphrasing here, but you understand what I mean.
By selecting a template, the software immediately selects a "profile" of the set of settings.
And a good part of the traces, connections and links is drawn by software . The draftsman is there to follow, check and add details.
But all this is already an outdated thing. Now, a good part of the work is done by the AI built into such a software package.

[Altra]

Thanks for your detailed answer!

This one is more awesome.Some of this is a repeat of the first video. Everything I thought I knew was wrong

https://www.youtube.com/watch?v=ySuUZEjARPY

[ivconic]

Thanks for your detailed answer!

This one is more awesome.Some of this is a repeat of the first video. Everything I thought I knew was wrong

https://www.youtube.com/watch?v=ySuUZEjARPY

Everything I was sure I had no idea about; it turned out to be exactly the case!

[Carl-NC]

Here is the layout of a micro (100pin STM32L496) in one of my metal detector designs:



This is only 2 layers, not shown are the ground and supply layers. It would be impossible to add all the grounds and supplies and still maintain 2 layers. I have other designs (with a micro) that were possible with only 2 layers. I have also done BGA designs which are only possible with 6 layers. The number of layers you need depends on the complexity of the design, not simply whether or not it has a micro. However, most of my designs use 4 layers: top signal, ground, supply, bottom signal. It is best to ground-flood the top & bottom layers, except around areas super-sensitive to leakage.

[eclipse]

Commercial design with micro:
- Top/Bottom layers have no ground planes
- Inner 1 has no ground plane
- Inner 2 has quite a few ground planes (95% coverage) separated by zones, ie: Preamp+TX, MCU, Integrator, Filter all separated with 0.00 Ohm resistor, It's easier even when you design it because you can have
several ground tracks with different labels because they have no direct connection between them. (GND_0, GND_1, GND_2, GND_3...)
GND connections from components go directly to GND plane with short path + via to the Inner 2.

[Altra]

Thank you, Carl and eclipse. That is good information.
How would analog ground or Vref be handled?

I was studying a 22 year old ML Explorer pcb. It is digital on one side and analog on the other. It's layed out like eclipse described with zoned planes. I need to probe it and see how the layers are ordered.

[Carl-NC]

How would analog ground or Vref be handled?

As eclipse said, you use separate ground planes. Here is another detector I designed:


The analog circuitry has a separate ground plane and it connects to the main ground plane under the ADC with a bottom metal strap I can cut if I want to try something else. In general, I try to route analog signals on the top layer and digital signals on the bottom in the analog circuitry area. Not shown is the power layer, which has multiple domains and discrete routing in the case of the analog circuitry. I don't know what you mean by Vref.

[Altra]

On analog circuits in general Vref = 1/2 Vcc. Thinking in terms of a split supply

[Carl-NC]

I would put it on an isolated area either on the ground layer or the supply layer, depending on how everything else lays out.

[Altra]

I would put it on an isolated area either on the ground layer or the supply layer, depending on how everything else lays out.

Thanks!

[Eddy71]

Where noise on printed circuit boards comes from:

https://www.analog.com/en/resources/...impedance.html