Hi all,
I'm just thinking that it is a mistake in the 555 section of the timing.
Let's explain: the first tlc555p ic is connected as astable using 47nF capacitor and 6k8 ohm resistor plus 47k resistor and 10 k trimmer, so calculating (using national datasheet formulas) timings I've obtained are:
T1= 220uS and a period T of 2.3 ms to 1.973 ms (from 434Hz to 507Hz)
where T1 is the "on" or "tx" pulse duration that is not equal to the 100us we can see written in the schematic under the tlc555p block.
I built a prototype on breadboard to be sure and measure a tx pulse of 228us. Frequency is in the range 440-520 Hz.
This will mean more tx pulse duration and more current drawn and so more power but more battery drain.
Anybody knows what's going on ? What are the real timings of goldscan iv ?
Thanks
I'm just thinking that it is a mistake in the 555 section of the timing.
Let's explain: the first tlc555p ic is connected as astable using 47nF capacitor and 6k8 ohm resistor plus 47k resistor and 10 k trimmer, so calculating (using national datasheet formulas) timings I've obtained are:
T1= 220uS and a period T of 2.3 ms to 1.973 ms (from 434Hz to 507Hz)
where T1 is the "on" or "tx" pulse duration that is not equal to the 100us we can see written in the schematic under the tlc555p block.
I built a prototype on breadboard to be sure and measure a tx pulse of 228us. Frequency is in the range 440-520 Hz.
This will mean more tx pulse duration and more current drawn and so more power but more battery drain.
Anybody knows what's going on ? What are the real timings of goldscan iv ?
Thanks
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