Help needed for optimizing

[moodz]

Moodz, thanks for the links. How is your FPGA coming along? I am waiting anxiously.

With the differential input, I have noticed some quirks that I am trying to understand. It seems to be very important for the leads to and from the coils to be done in a certain way. Any deviation from the right way seems to generate notable differences at the input of the preamp.

I have been working on this by trial and error, but I am sure there are a few simple thumbs rules that could help me greatly in understanding helping to find a reasonable solution quickly.

For example, the many frequencies involved.

The rate of change in the response signal, from no target to full target, varies from about 3Hz to 20Hz.
The smallest targets have a frequency, or maybe I should say delta? of about 5uS. I noticed that the bandwidth of the Preamp needs to be about 200kHz, below that, the signal of small targets, shows notable attenuation.

Now, my synchronous sampling can vary between 10Khz to 1KHz.

Somehow, these frequencies interact. I don't know how, but I notice notable differences in the results caused by the interactions.

Then, in the house, there is the overpowering 60Hz mains noise. the system here is 120V, a single phase and Ground, whereby Ground is really ground, the power lines only have phase, no ground or neutral cable. This makes it that If I touch the scope probe, I get a 60Hz sine wave of somewhere 35 to 70V, depending on the humidity.

These 60Hz and the harmonics thereof, stick their ugly head out everywhere and grin at me. Any little piece of wire gives them a chance to wriggle themselves into my circuit.

Differential input helps a lot, but the common mode rejection is only as good as the matching of the inputs etc.

Some simple basic advise on these subjects would be most helpful.

Ah, by the way, in spite of all that, I get an easy 70cm in air on a 1 Euro coin. I know it can be improved.

Tinkerer

My boss at work is being a right PITA at the moment and it kind of distracts me from the real work ( FPGA ).

I just need to pull my finger out and finish the three different versions I currently have under construction. The 24 bit ADC is sampling at 192 Khz or 5.208 uSecs ..synchronous so should be fine for your application. Input range is nearly +/- 2.5 volts.
If you PM me the exact Tx timings I can plug them into a pulse gen module in the FPGA. I can also support 24 bit DAC output as well if you need analogue output(s).

Bad luck about your power ... they call that SWER over here in oz ... Single Wire Earth Return for the mains .... must cause you to SWER alot.

Moodz.

[Tinkerer]

Moodz.
thanks for the reply. I will PM you with a timing schedule etc.

With my present setup, a sample timing resolution of 200nS would give much more information about the Ground and the target. The sample itself could be about 3uS. Of course, the FPGA could do the necessary number crunching.

24bit resolution with +/- 2.4V signal amplitude should work. Dsp filtering should be able to remove the 60Hz noise, but I want to try synchronizing the sampling to the 60Hz, in the hope to reduce the noise at the input.

I changed the cable again. The CAT5 cable was fine, but the home made twisted pair gave a higher signal amplitude.
So now I tried a twisted shielded pair from CAROL. The signal comes out with high amplitude and really clean. It is obvious that the bandwidth is much reduced. Is it too much reduced? I need to find the specs of the cable and run the tests to see if the response to very small targets is attenuated.

Tinkerer