PI CHIP

[moodz]

After a few days of coding I can now announce I have a PI CHIP based on a cheap PIC chip with the following features.

- Low cost $6AUD
- 28 pin DIP ... easy to solder or socket
- simple three wire serial interface. TX RX GND RS232
- Complimentary TX pulse output adjustable in 33 nanosecond steps.
- TX pulse repetition adjustable from 100 to 20 Khz.
- 10 bit ADC but achieves better than 16 bit resolution ( 85 microvolts )
- SAT processing of input analogue input
- three sample pulse pin outputs with delay and duty adjustable in 33 ns steps.
- PWM output from SAT code for metering or feedback control of bucking coil via low pass filter and MOSFET.
- PWM target response output for analogue metering.
- Audio output pin. Target response = higher frequency.
- All settings adjustable via serial port.
- All settings can be saved in onchip eeprom

The idea is to set up the variables ... save them then test.
A laptop can be used in the field.

A dump of the serial console session is shown below.

Moodz.



E: TIMER1 : Count = 1000 Delay = 33.921 usec
F: T1Duty : Count = 100 Duty = 3.392 usec
G: TIMER2 : Count = 2000 Delay = 67.843 usec
H: T2Duty : Count = 100 Duty = 3.392 usec
I: TIMER3 : Count = 2500 Delay = 84.803 usec
J: T3Duty : Count = 100 Duty = 3.392 usec
ADC sample = 65592
ADC SAT sample = 65495 4.996948 Volts DIFF = -97 -0.007401 Volts
K: ADC val avg count = 4096
L: SAT val avg count = 1024
M: AUDIO freq range count = 100000
>
Metal Goose by Moodz v1.2
S: Save all vars to EEPROM
R: Read all vars from EEPROM
STATUS:
X: CPU Ref Clock : 7370.000 Khz
PWM Step is 33.921 Nanosecond
A: PERIOD : Count = 730 Freq = 10.096 Khz Period = 99.050 usec Scale factor = 89
B: PWM1 TX PULSE : Count = 990 Duty = 33.582 usec
C: PWM2 TARGET : Count = 1468 Duty = 49.796 usec
D: PWM3 THRESHOLD : Count = 2943 Duty = 99.830 usec
E: TIMER1 : Count = 1000 Delay = 33.921 usec
F: T1Duty : Count = 100 Duty = 3.392 usec
G: TIMER2 : Count = 2000 Delay = 67.843 usec
H: T2Duty : Count = 100 Duty = 3.392 usec
I: TIMER3 : Count = 2500 Delay = 84.803 usec
J: T3Duty : Count = 100 Duty = 3.392 usec
ADC sample = 65592
ADC SAT sample = 65495 4.996948 Volts DIFF = -97 -0.007401 Volts
K: ADC val avg count = 4096
L: SAT val avg count = 1024
M: AUDIO freq range count = 100000
>

[Vortxrex]

Hi Moodz, can't wait to hear more !

Dave Frank

[maca404]

Looks good, What method are you using for signal detection.

[moodz]

signal detection.

The A2D signal is passed to a fast and slow averaging filter. The signal is typically the difference between these two filters. This is calculated as simply as A1 - A2.
The diff signal drives a freq gen. Typically the detector clicks away at 1 Hz .. a small target might double this to two hz. The human ear is very sensitive to pitch / timing changes than volume. A large target will produce a higher freq change ...say 1 Khz.

Regards

moodz.

[maca404]

Very cool, I just finished implementing a fpga backend in to my first HH project and will soon be building your model T front end to have a play with. My current incarnation I am doing similar to you but on multiple chunks of the waveform and then looking at the rate of change to determine how fast the target decays. Im still playing with it but by setting a "cut off" decay rate im able to get rid of ground noise from the original signal. Removing ground is one of my main goals at this point, Im lucky enough to live in the golden triangle however the ground is a detectors nightmare.

[moodz]

Very cool, I just finished implementing a fpga backend in to my first HH project and will soon be building your model T front end to have a play with. My current incarnation I am doing similar to you but on multiple chunks of the waveform and then looking at the rate of change to determine how fast the target decays. Im still playing with it but by setting a "cut off" decay rate im able to get rid of ground noise from the original signal. Removing ground is one of my main goals at this point, Im lucky enough to live in the golden triangle however the ground is a detectors nightmare.

So how fast and how many bits of resolution are you sampling ? The FPGA version of my detector uses the same method I described above however instead of a single averaging sample the FPGA does a fast and slow average at every point of the waveform .. the maths is then Waveform_A - Waveform_B to leave the difference "Waveform". The difference waveform then used as baseline leaving only target response.

Moodz.

[maca404]

I'm only sampling 8 bits unfortunately till I get a better ADC but its at 100mbps, the main pulse is running at 4khz and I have a sampling clock which starts the sampling from just after the neg edge of the main pulse I then put the data in dual port ram and shift it out to the computer. If I sample at full speed I can only sample the first 20us as it takes the rest of the time to shift the data to the computer before the next pulse. At the moment I sample the whole waveform in to ram then shift it out to the PC and just miss the pulses in between.

[moodz]

I'm only sampling 8 bits unfortunately till I get a better ADC but its at 100mbps, the main pulse is running at 4khz and I have a sampling clock which starts the sampling from just after the neg edge of the main pulse I then put the data in dual port ram and shift it out to the computer. If I sample at full speed I can only sample the first 20us as it takes the rest of the time to shift the data to the computer before the next pulse. At the moment I sample the whole waveform in to ram then shift it out to the PC and just miss the pulses in between.

...you still have some work to do .... however 8 bits can become more bits by oversampling and decimating / shifting as required. I get 6 extra bits out of my 10 bit ADC and I am "only" sampling at 1MSPS ... good start though.

Here is the latest on the PI chip ... I had some problem with interrupt jitter where CPU interrupts were jittering the timing ... all solved. Main Tx pulse and Two independant sample pulses now jitter free and can be set over serial port.
Below we are running with a fast TX pulse of 10 Khz and two sample pulses. Not practical ... used to demo fine timing settings. There is also a screenshot of the serial terminal console showing settings. The camera is fuzzy because its off my mobile and its got dust inside

moodz

[moodz]

Updated Specification v2.0

- 28 pin DIP ... easy to solder or socket
- accurate internal oscillator ... no crystal required.
- simple three wire serial interface. TX RX GND RS232. Does not need the serial interface to operate in field once timings saved to onchip eeprom.
- Complimentary TX pulse output adjustable in 66/33 nanosecond steps from 0 to full duty cycle.
- TX pulse frequency adjustable from 1Khz to 10 Khz.
- 10 bit ADC but achieves better than 16 bit resolution ( 85 microvolts ) through coding.
- SAT processing of analogue input
- two independant sample pulse pin outputs with delay and ON time adjustable in 33 ns steps.
- PWM output from SAT code for metering or feedback control of bucking coil via low pass filter and MOSFET.
- PWM target response output for analogue metering.
- Audio output pin. Target response = higher frequency. ( approx 1 sec clicks to 1 khz)
- All timings adjustable via serial port.
- All settings can be saved in onchip eeprom

This chip is designed to be the heart of a set and forget PI. All the TX, sample timing, SAT and audio is done by the chip. This should make something like a surfPI type detector very simple. You connect via a serial port and text console. Change the timings to suit your coil. Save to eeprom. Then just use.

Because you can adjust the Tx pulse duration and Freq and Rx sampling pretty much how you please as well as reading some results from the serial port this is a good chip for PI experimenters.

If there is enough interest I will add an LCD, rotary encoder and additional sample pulses / timing selection to a Mk 3 version ( but this will be a larger chip ... + additional cost ).

moodz.

[mickstv]

Hi Moodz, So will this new design be avaiable in the future as a kit of parts, or are you going to open source it and spread the info.



cheers
Mick

[moodz]

Hi Moodz, So will this new design be avaiable in the future as a kit of parts, or are you going to open source it and spread the info.



cheers
Mick

Good question .... I think I will start with a kit or chips only and consider open source down the track. This mainly because others usually grab your source, relabel it as theirs and sell their own version. Do you know of any open source PI chips ?

I guess at the moment its PI and chips but no sauce ... (very small joke )

moodz.

[maca404]

Thanks for the tips moodz, I was just reading an atmel paper on oversampling and decimation and I can see now how this will be very helpfull. On a side note from all your work what have you found to be a good general frequency for the main pulse.

[Vortxrex]

Hi Moodz, I am interested in buying whatever kit you offer. Dave Frank

[moodz]

Thanks for the tips moodz, I was just reading an atmel paper on oversampling and decimation and I can see now how this will be very helpfull. On a side note from all your work what have you found to be a good general frequency for the main pulse.

With 100 msps you should be able to get some good oversampling. The higher the Tx frequency the higher the sample rate which means more bits for resolution.

For example if you take 4096 samples and sum them to a single value then right shift this sum by 6 bits you end up with a 14 bit value ( with your 8 bit ADC )

Ideally the 4096 samples should always be sampled at the same point / time on the waveform. So if your Tx waveform was running at 8.192 Khz your 14bit oversample sum would be updating at twice a second ... maybe a bit slow for fast sweeping of the coil.

I would start with 1 Khz with a 100us tx pulse. You then have 900 us to play RX in ( overkill I know ) and take multiple adjacent samples ( eg 16 because your ADC is so fast the voltage will not change much in 16 samples ) at each sample point ( say two ... early and late ) . You do this for each pulse. That gives you an equivalent sample rate of 16 Khz and with a 14 bit oversample an update rate of 4 hz. You should do the sample summing in your dual port ram then transfer to PC only the sum of the 4096 samples. This will reduce traffic and is more elegant. Of course eventually you want to do the lot inside the FPGA.

moodz.

[moodz]

Hi Moodz, I am interested in buying whatever kit you offer. Dave Frank

I will probably be able to ship the chip and a suggested circuit quite soon .... I will put up some more specs and test results shortly so people can decide. I am not intending to make anyting out of this so it will be chip cost + programming cost + postage to wherever you are.