Simulation (ngspice) versus measurement.

[Teleno]

Hi to all!

I've just discovered this forum due to my recent interest in gold prospecting (retirement is homing in).

My field of competence is electronics and I'm busy designing a PI metal detector from scratch as a hobby. This thread is intended for other experts in a position to clarify the cause of observed discrepancies between a circuit simulation and its behaviour in real life.

The circuit I'm referring to is a simple PI coil drier using a MOSFET. Here it is:

I've added the leak resistance (R coil) and parasitic capacitance of the coil, as well as a damping resistor (Rcomp). The BS170 is rated 200V and that's the maximum flyback emf we're gonna get. The pulse is 40us wide with rise and fall times of 500ns.

The ngspice simulator gives the following voltage signal at the drain of the BS170:

However, when the circuit is built on a breadboard, the signal decay is much slower like this (blue trace):

.

Any idea of what could be causing a decay so different from the theoretical one? There are no metallic objects near the coil, so I discard induced signals from target eddy currents.

I've chosen a low inductance coil (40uH) in order to get a very short transient, but I'm not having any success.

Could the collapsing field be inducing currents in the coil that ngspice does not account for?

SPICE definition of the circuit follows. The graph is obtained using "plot V(2)" after the command "tran 1n 70u".

VD 1 0 9V

X_M1 2 3 0 BS170

L_L1 1 1b 40uH
R_LEAK 1b 2 0.1R
C_PARASITIC 1 2 40e-12

R_COMP  1 2 2200

R_RPROBE 2 0 10e6
C_CPROBE 2 0 10e-12
                
V2 3a 0 PULSE 0V 9V 2u 500ns 500ns 40us 1s
R_RSOURCE 3a 3 200R


*
*  ZETEX  BS170 Mosfet Spice Subcircuit   Last revision  3/5/00
*
.SUBCKT BS170 1 2 3
**************************************
*      Model Generated by MODPEX     *
*Copyright(c) Symmetry Design Systems*
*         All Rights Reserved        *
*    UNPUBLISHED LICENSED SOFTWARE   *
*   Contains Proprietary Information *
*      Which is The Property of      *
*     SYMMETRY OR ITS LICENSORS      *
*Commercial Use or Resale Restricted *
*   by Symmetry License Agreement    *
**************************************
* Model generated on Mar 29, 04
* MODEL FORMAT: SPICE3
* Symmetry POWER MOS Model (Version 1.0)
* External Node Designations
* Node 1 -> Drain
* Node 2 -> Gate
* Node 3 -> Source
M1 9 7 8 8 MM L=100u W=100u
* Default values used in MM:
* The voltage-dependent capacitances are
* not included. Other default values are:
*   RS=0 RD=0 LD=0 CBD=0 CBS=0 CGBO=0
.MODEL MM NMOS LEVEL=1 IS=1e-32
+VTO=3.30828 LAMBDA=8.59847 KP=12.3217
+CGSO=6.31523e-07 CGDO=2.58372e-08
RS 8 3 2.67458
D1 3 1 MD
.MODEL MD D IS=1e-06 RS=1.38238 N=0.6 BV=200
+IBV=0.0001 EG=1 XTI=4 TT=0
+CJO=9.94504e-11 VJ=0.5 M=0.564013 FC=0.1
RDS 3 1 1.3e+10
RD 9 1 5.83469
RG 2 7 61.0848
D2 4 5 MD1
* Default values used in MD1:
*   RS=0 EG=1.11 XTI=3.0 TT=0
*   BV=infinite IBV=1mA
.MODEL MD1 D IS=1e-32 N=50
+CJO=6.71415e-11 VJ=0.5 M=0.9 FC=1e-08
D3 0 5 MD2
* Default values used in MD2:
*   EG=1.11 XTI=3.0 TT=0 CJO=0
*   BV=infinite IBV=1mA
.MODEL MD2 D IS=1e-10 N=0.4 RS=3e-06
RL 5 10 1
FI2 7 9 VFI2 -1
VFI2 4 0 0
EV16 10 0 9 7 1
CAP 11 10 6.71416e-11
FI1 7 9 VFI1 -1
VFI1 11 6 0
RCAP 6 10 1
D4 0 6 MD3
* Default values used in MD3:
*   EG=1.11 XTI=3.0 TT=0 CJO=0
*   RS=0 BV=infinite IBV=1mA
.MODEL MD3 D IS=1e-10 N=0.4
.ENDS BS170

Thank you for any insights!

[Qiaozhi]

LTSpice gives the same result using your netlist, so clearly simulation and reality do not match in this case. The signal is underdamped in the simulation, whereas the real circuit must have more capacitance than you've accounted for in the model.

[Teleno]

Thank you, Qiaozi,

I've modified the model to include larger coil capacitances (though the coil is spider-web type) and the impedance of the scope probe (10Mohm, 10pF). In no way I'm able to reproduce the observed waveform.

I guess I'll have to do away with he breadboard and solder a "dead bug" circuit or the like, then test again. It' s frustrating.

[green]

Just a thought. Are you driving the gate with a 400hz square wave. It should take only a few usec to get the coil current up to the BS170 rating

[Teleno]

Just a thought. Are you driving the gate with a 400hz square wave. It should take only a few usec to get the coil current up to the BS170 rating

Well no, I'm using one output pin of an ATtiny85 that pulses for 50us four times a second.

I think I have solved the mystery.

I was meassuring the voltage at the drain of BS170 using a 1:10 resistor divider, like this (R_DIV1, R_DIV2):

Then I introduced a parasitic capacitance into de divider and the simulation matches almost exactly the scope waveform:

Simulation:

I added the divider to the NGSPICE circuit description as follows:

R_DIVIDER1 2 23 56000R
R_DIVIDER2 23 0 5600R
C_BREADBOARD 23 0 100e-12

and then "TRAN 1n 200u" , "plot v(23)".

Now the problem is the receive circuit in a PI taps the coil via a resistor in series with a diode connected to ground (to clamp the flyback emf to 0.6V). This resistor/diode network might introduce a parasitic capacitance with the effect of increasing the transient's duration and therefore the sensitivity of the detector. Now I'm achieving a 2us transient time. I'll see how I go about this...