Let's made a PC-base metal detector with usb interface !!!

[Aziz]

Hello friends,

I am preparing a new very simple PI laptop schematics for direct and continious time-domain sampling and frequency domain processing.

Following features will be implemented:
- single power supply (12 V)
- transmit pulse frequency: 20 Hz to 12 kHz
- flexible configuration through jumpers:
° pulse width timing adjustable either through phase shift of the reference clock signals (using left and right channel, max. pulse width = 1/(2*freq) )
or directly from the shape of the left reference signal
° or using alternating time constant operation mode (decay curves)

- supports MONO and DD coil configurations
- supports two channel processing (MONO: attenuated coil voltage + clipped coil voltage, DD: receive coil voltage + one of the transmit coil signals). The sound card input line will be protected through clipping diodes. It also will support microphone input lines (decoupling the phantom power supply).

- no microcontroller
- no DC/DC charge pump
- no amplifiers (no additional noise )
- laptop and PI hardware could share same powering (same grounding).
- 5V logic (a low power variant can be powered directly from USB port later).

To make direct sampling possible, the time constant of the coil will be set high (low damping resistor, slow coil, low flyback voltage). The flyback voltage should not exceed 100V. I will use the MOSFET IRF9540 due to very low Rdson resistance and it makes same grounding possible. It also will clip the high flyback voltage (~100 V avalanche breakdown voltage).

The alternating time constant operation mode will make the decay curve fast and slow depending on the second reference clock (if set to fclk=fcycle/2).

I will check and test this for you, whether it works satisfying and delivers enough signals for direct frequency domain software detection. In case of good results, I also will publish the whole schematics with the SPICE simulation files, so you can look, how the simple PI hardware works.

Just give me same days...

Aziz

[Aziz]

Hello friends,

I need your help. It is probably beyond my scope to solve the alternating time constant damping. I have a simple solution till now and I suppose it isn't elegant enough.

Following problem description:
A high side P-MOSFET (IRF9540N) is switching the grounded coil. On the hot coil connection (connected to P-MOSFET drain), a negative flyback voltage of max. -100 V occurs. I need a circuit to switch the hot coil end with a resistor to ground to modify the damping resistor.

Have you got an idea, how to do this?

If there is a need for negative switching logic, no problem at all. We have a flyback voltage converter, which can be extracted through the switching coil.

The solution I have uses two zener diodes and another two P-MOSFET's (BS250 and IRF9540N). The negative switching voltage is generated from the coil itself.

If you have a good solution, then please let me know.

Aziz

[simonbaker]

Hello friends,

I need your help. It is probably beyond my scope to solve the alternating time constant damping. I have a simple solution till now and I suppose it isn't elegant enough.

Following problem description:
A high side P-MOSFET (IRF9540N) is switching the grounded coil. On the hot coil connection (connected to P-MOSFET drain), a negative flyback voltage of max. -100 V occurs. I need a circuit to switch the hot coil end with a resistor to ground to modify the damping resistor.

Have you got an idea, how to do this?

If there is a need for negative switching logic, no problem at all. We have a flyback voltage converter, which can be extracted through the switching coil.

The solution I have uses two zener diodes and another two P-MOSFET's (BS250 and IRF9540N). The negative switching voltage is generated from the coil itself.

If you have a good solution, then please let me know.

Aziz

Can you show schematic of problem?

-SB

[Aziz]

Hi all,

my solution (problem above) seems to work stable and well so far. It supports also a negative voltage for a pre-amplifier (if necessary). A fraction of the flyback voltage will used to get the negative supply voltage.
To have more target signal stimulation, I will increase the flyback voltage upto 200 V or 400 V. The IRF9640 (P-MOS) seems to be a good alternative, which makes a 200 V flyback voltages possible. The higher the flyback voltage, the higher the target stimulation. But the P-MOSFET's aren't much higher voltage rated and they generally have more on-resistance on higher drain-source voltages. I think, 200 V flyback voltage should be high enough.

Below is the target induction voltage (green) vs. coil current (blue). Now we should be able to detect the tiny longer lasting signals with the slow ADC better. A DD coil configuration gives a much higher signal dynamic range.

Aziz

[simonbaker]

Question is: is slow damping as sensitive to presence of target as fast damping (change in pulse)?

-SB

[Aziz]

Hi simonbaker,

Question is: is slow damping as sensitive to presence of target as fast damping (change in pulse)?

-SB

a good question. Slower damping causes lower target signals (as shown above). But they last longer, which can be sampled longer (slow ADC). Therefore an alternating damping will be used. On every alternating cycle, the damping will be fast and slow and I can get both strength response of target signals.

And we have oversampling!!! This will increase our SNR much (like box-car integrator method). A much higher pulses per second (PPS) can be used (1000-6000 PPS or more) at cost of more power consumption (why not).

The huge sensitivity will come from the DD coil configuration. The receive coil won't have the huge flyback voltage and it sees directly the target response. The dynamic range will be much higher compared to MONO coil configuration.
If we use the MONO coil configuration, we can process the attenuated transmit coil decay voltage and the residual coil voltage (after clipping).
And of course, we also sample the transmit-on signals.

By the way, I have reduced the circuit complexity. The alternating coil damping needs now only one zener diode and one additional P-MOSFET (same as for transmit coil switching).

Below is the current coil driver circuit (not optimized yet). The clock signals are coming from the clock generation module (not shown yet). The switchable damping is now very vey simple (not shown yet).

I need to build this prototype to say more. I am sure, it will give some basis for experimenting.

Aziz

[Aziz]

Hi all,

I am thinking of adding a two channel single stage amplifier to the PI board. This will give the option of increasing the signal dynamic range. The two channels (left/right) can be used for different configurations.

The AC amplifier will work from a single +5V power supply and will be biased to 2.5V level. The bias voltage will be generated from a reference voltage bandgap diode to minimize the power supply noise. A single supply rail-to-rail op-amp is necessary. I found the OP284 as a good choice but I don't know, where to get it.

Below is the first part of the schematics: Power supply module and the two channel reference clock generation modules.

The reference clock is a pure sine wave from the sound card output and will be converted to a 5 V logic. To avoid noise to the clockings and prevent the logic signals to get into unstable oscillation state, a minimum hysteresis voltage is required (30-50 mVpp). The hysteresis is defined by the feedback resistor (220 kOhm). If there is no reference clock on the input, the coil won't be switched on and the logic levels are stable (default state).

Depending on the operation mode, the transmit pulse width can be adjusted. If the alternating damping is not used, two different pulse width modes can also be used with different reference clocks. The phase shift of the reference clocks will be used to set either the pulse width or the time position to start with alternate damping.

Using two reference clocks will give more flexibility to the PI board.

I will focus now to the amplifier.

Aziz

[Aziz]

Hi friends,

damn, it is very difficult to get single supply, low noise rail-to-rail op-amps. Bipolar supplied op-amps achieve a much lower noise performance and are easy to get. The common mode has also some benefits to signal conditioning.

The negative control voltage for alternate damping won't be generated from the flyback coil voltage anymore. This will improve the signal quality further and avoids additional non-linearities (no additional load to the damping process).

A free running discrete DC/DC converter with synch input will be implemented therefore. The schematics needs some redesign.

Aziz

[Aziz]

Hi all,

the clock generation modules and DC/DC converter will have a CD40106 schmitt-trigger inverter. I didn't use the ICL7660, as this chip is only specified upto 10 V operating voltage (). The A-grade up to 12 V. I also want to run the DC/DC converter at much higher frequencies than 10 kHz. Last but not least, I couldn't find a spice model for this darn chip.

Therefore a well designed discrete DC/DC converter would give more accurate and well specified behaviour. The DC/DC synchronisation will synchronise to the clk1 by discharging the oscillator capacitor to ground. This ensures accurate synchronisation of the free running oscillator. The higher operating frequency (30-100 kHz) will also generate the negative voltage faster. See below for more details.

The system supply voltages will be +UBat (12V battery voltage), +U (RC-filtered +UBat), Vee (appr. -9 .. -10V from DC/DC converter), +5V and -5V. I also will add a reverse polarity protection to the schematics to avoid circuit damages.

The pre-amps will be a dual NE5532 or any other low noise op-amps.

The reason for an active amplifier PI board is as follows:
Implementing different amplifications (like 10x and 500x) will produce different duty-cycle signals depending on the target response. The op-amps will go to the overdrive (saturation) state and recover within 1-2 µs. The duty-cyle of the both signals should be detected even on a slower ADC. This gives the possibility to detect the time constant of the target and could be used for discrimination.

I will continue with the design. I also need some new parts to build this prototype. This could take some time.

Aziz

[Aziz]

Hi all,

I am quite surprised about, how good the circuit simulation gives some estimations. The coil signals are diminishing really very fast into the µV .. nV range. So it is still difficult to detect them in a slow ADC (sound card). With the 96 kHz sampling rate, we need appr. 20 µs to detect the maximum nyquist frequency of 48 kHz (just 2 samples necessary). Within this time, the normal damping is almost finished. So making the damping slow gives some time for detection but will kick the target less and thus generating not much signal response.

The circuit simulation shows however good results on DD coil configuration. The slow damping in conjunction with high amplification will compensate the low target response and gives reasonable results. It also gives target responses during transmit on pulses.

Attenuated coil voltage sampling gives not much benefits. The signals are very low.

Normal damping is too fast for detecting signals. They won't be passed through the antialias filter of the sound card (low pass filter). Normal damping will give signals for bigger targets.

We need to downsample the fast decaying signals within the short damping process into a low frequency output. A similar method is known as the bucket brigade device (BBD), which could make downsampling possible. I have tried to simulate such a device. But the results were not promissing much due to switching noises even if I would use a differential BBD (parasitic capacitances, charge injections of the switching elements).

No, I will not give up to use the 24-bit ADC!!!

Aziz

[Aziz]

Hello friends,

I want you playing with some spice circuit simulations. Load the latest LTSpice version IV and set to alternate engine after installing it.
LTSpice IV download:
http://www.linear.com/designtools/software/#Spice

Unpack the zip file below into a directory of your choice and load the schematics file "LaptopPI-01-DC-DC-converter.asc".

See how the DC/DC converter and reference clock generation modules works. The DC/DC converter runs at 50 kHz and synchronizes to 3 kHz reference clock 1. The synchronisation takes some time until a steady state is achieved (capacitors loaded, stable operating points on nodes estabilished).

Have fun with circuit simulations.

Aziz

[simonbaker]

Hi all,

I am quite surprised about, how good the circuit simulation gives some estimations. The coil signals are diminishing really very fast into the µV .. nV range. So it is still difficult to detect them in a slow ADC (sound card). With the 96 kHz sampling rate, we need appr. 20 µs to detect the maximum nyquist frequency of 48 kHz (just 2 samples necessary). Within this time, the normal damping is almost finished. So making the damping slow gives some time for detection but will kick the target less and thus generating not much signal response.

The circuit simulation shows however good results on DD coil configuration. The slow damping in conjunction with high amplification will compensate the low target response and gives reasonable results. It also gives target responses during transmit on pulses.

Attenuated coil voltage sampling gives not much benefits. The signals are very low.

Normal damping is too fast for detecting signals. They won't be passed through the antialias filter of the sound card (low pass filter). Normal damping will give signals for bigger targets.

We need to downsample the fast decaying signals within the short damping process into a low frequency output. A similar method is known as the bucket brigade device (BBD), which could make downsampling possible. I have tried to simulate such a device. But the results were not promissing much due to switching noises even if I would use a differential BBD (parasitic capacitances, charge injections of the switching elements).

No, I will not give up to use the 24-bit ADC!!!

Aziz

What about the time multiplexing? Use hardware to take 4 fast samples, then multiplexer at different clock rate to read them?

Regards,

-SB

[Aziz]

Hi simonbaker,

What about the time multiplexing? Use hardware to take 4 fast samples, then multiplexer at different clock rate to read them?

Regards,

-SB

the simple BBD schematics below does a simple downsampling. But it can not achieve good SNR. It is a fully differential BBD to minimize the switching and common mode noises. The clocks T1 and T2 may not overlap (break before make). On the decay curve, T1 and T2 is clocked at 500 kHz for acquisition and is downsampled to 10 kHz. The circuit is quite simple compared to a S&H amplifier and can be stacked to more buffers.

I think, the former presented stereo modulator will do the job much better.

I will test the direct sampling first to make the whole circuit simpler.

Aziz

[Aziz]

Hi all,

check this out:
page 29: A precise four-quadrant multiplier with subnanosecond response.
http://www.ieee.org/portal/cms_docs_...ons/200710.pdf

The Gilbert cell four-quadrant multiplier would simplify the modulator radically, when only one sample of each stereo line is modulated. The pure reference sine signal could be fed directly to the multiplier to perform the channel modulation.

I will check some integrated four-quadrant multiplier chips soon. This could reduce further noise and circuit complexity.
Aziz

[Aziz]

Hi all,

I had a look into some analog multiplier IC's. Tooooo much expensive $$$$!
It is due to super matched transistor pairs in the Gilbert's cell core. A discrete implementation would even cost much more.

The low cost AD633 needs more supply voltage (+-8V). The analog multipliers generally need more operation current (the current is the result of the math). That's quite critical. They also have generally bad noise characteristics.

The one, I would like to try it out was the AD834. But it is difficult to get this chip. It is also quite expensive.

---

I will try the DD coil configuration next time with direct sampling on a slow decaying coil voltage.

Aziz